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authorChris Packham <judge.packham@gmail.com>2021-07-05 09:11:45 (GMT)
committerChris Packham <judge.packham@gmail.com>2021-07-05 09:11:45 (GMT)
commit5ab678eae33f8e1d2a43f96a1769a18dd088dee4 (patch)
treeb77fbed7270843149b5d49f561d42dbf2a37ac4e /packages/gcc/9.4.0/0015-crystax.patch
parent94b98a4cc96ff6c4ca982ea19db953447e802919 (diff)
gcc: Bump maintenance versions
8.4.0 -> 8.5.0 9.3.0 -> 9.4.0 Signed-off-by: Chris Packham <judge.packham@gmail.com>
Diffstat (limited to 'packages/gcc/9.4.0/0015-crystax.patch')
-rw-r--r--packages/gcc/9.4.0/0015-crystax.patch33
1 files changed, 33 insertions, 0 deletions
diff --git a/packages/gcc/9.4.0/0015-crystax.patch b/packages/gcc/9.4.0/0015-crystax.patch
new file mode 100644
index 0000000..a0bad24
--- /dev/null
+++ b/packages/gcc/9.4.0/0015-crystax.patch
@@ -0,0 +1,33 @@
+commit 8a66d422721ae5999737d7825701ff22097d287b
+Author: Andrew Hsieh <andrewhsieh@google.com>
+Date: Mon Apr 14 21:05:51 2014 -0700
+
+ [android] Fix ARM generates insufficient alignment for NEON vst/vld
+
+ See d909af3e2469aad87d5c3e79b93c778fd26c03a9
+
+ Change-Id: Ie1de9f946f397196bb6f1623f5add86933739484
+ Signed-off-by: Dmitry Moskalchuk <dm@crystax.net>
+
+---
+ gcc/config/arm/arm.c | 8 ++++++--
+ 1 file changed, 6 insertions(+), 2 deletions(-)
+
+--- a/gcc/config/arm/arm.c
++++ b/gcc/config/arm/arm.c
+@@ -22862,9 +22862,13 @@ arm_print_operand (FILE *stream, rtx x,
+ memsize = MEM_SIZE (x);
+
+ /* Only certain alignment specifiers are supported by the hardware. */
+- if (memsize == 32 && (align % 32) == 0)
++ /* Note that ARM EABI only guarentees 8-byte stack alignment. While GCC
++ honors stricter alignment of composite type in user code, it doesn't
++ observe the alignment of memory passed as an extra argument for function
++ returning large composite type. See http://gcc.gnu.org/bugzilla/show_bug.cgi?id=57271 */
++ if (memsize == 32 && (align % 32) == 0 && !TARGET_AAPCS_BASED)
+ align_bits = 256;
+- else if ((memsize == 16 || memsize == 32) && (align % 16) == 0)
++ else if ((memsize == 16 || memsize == 32) && (align % 16) == 0 && !TARGET_AAPCS_BASED)
+ align_bits = 128;
+ else if (memsize >= 8 && (align % 8) == 0)
+ align_bits = 64;