diff options
author | Yann E. MORIN" <yann.morin.1998@anciens.enib.fr> | 2007-07-14 17:02:05 (GMT) |
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committer | Yann E. MORIN" <yann.morin.1998@anciens.enib.fr> | 2007-07-14 17:02:05 (GMT) |
commit | 1aa5c8cf732a12c93f5bbb37be066f18d9da7f53 (patch) | |
tree | aa78e1f1e28b3e120d2281bd724ed0fae57fd1c6 /patches/strace/4.5.15/strace-fix-arm-bad-syscall.patch | |
parent | d393b01cb131079b767aa651dee01ff185bb0fce (diff) |
Add patches for strace 4.5.15.
Diffstat (limited to 'patches/strace/4.5.15/strace-fix-arm-bad-syscall.patch')
-rw-r--r-- | patches/strace/4.5.15/strace-fix-arm-bad-syscall.patch | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/patches/strace/4.5.15/strace-fix-arm-bad-syscall.patch b/patches/strace/4.5.15/strace-fix-arm-bad-syscall.patch new file mode 100644 index 0000000..d7d7426 --- /dev/null +++ b/patches/strace/4.5.15/strace-fix-arm-bad-syscall.patch @@ -0,0 +1,18 @@ +--- strace-4.5.12-orig/syscall.c 2005-06-08 21:45:28.000000000 +0100 ++++ strace-4.5.12/syscall.c 2005-10-25 19:26:39.000000000 +0100 +@@ -1013,6 +1013,15 @@ struct tcb *tcp; + /* + * Note: we only deal with only 32-bit CPUs here. + */ ++ ++ if (!(tcp->flags & TCB_INSYSCALL) && ++ (tcp->flags & TCB_WAITEXECVE)) { ++ /* caught a fake syscall from the execve's exit */ ++ tcp->flags &= ~TCB_WAITEXECVE; ++ return 0; ++ } ++ ++ + if (regs.ARM_cpsr & 0x20) { + /* + * Get the Thumb-mode system call number |