CT_ARCH_CPU="cortex-m3"
CT_ARCH_FLOAT_SW=y
CT_ARCH_arm=y
# CT_ARCH_USE_MMU is not set
CT_ARCH_ARM_MODE_THUMB=y
CT_TARGET_VENDOR="bare_newlib_cortex_m3_nommu"
CT_ARCH_BINFMT_FLAT=y
CT_LIBC_NEWLIB_IO_C99FMT=y
CT_LIBC_NEWLIB_IO_LL=y
CT_LIBC_NEWLIB_IO_FLOAT=y
CT_LIBC_NEWLIB_IO_LDBL=y
CT_LIBC_NEWLIB_DISABLE_SUPPLIED_SYSCALLS=y
CT_CC_GCC_BUILD_ID=y
CT_CC_LANG_CXX=y