patches/strace/4.5.18/110-dont-use-REG_SYSCALL-for-sh.patch
author "Yann E. MORIN" <yann.morin.1998@anciens.enib.fr>
Mon Jan 05 23:02:43 2009 +0000 (2009-01-05)
changeset 1126 1ab3d2e08c8b
permissions -rw-r--r--
Split CT_ExtractAndPatch in two: CT_Extract and CT_Patch:
- it is unworkable to have CT_ExtactAndPAtch cope with all those silly glibc addons:
- they can have 'short' (as 'ports') or 'long' (as glibc-ports-2.7) names
- patches are against eithe the short or long name, but non-uniformly use one or the other
- it is the reposibility of the component (glibc in this case) to handle corner cases such as those
- update all components to use the new functions

/trunk/scripts/build/tools/000-template.sh | 3 2 1 0 +-
/trunk/scripts/build/tools/100-libelf.sh | 3 2 1 0 +-
/trunk/scripts/build/tools/200-sstrip.sh | 3 2 1 0 +-
/trunk/scripts/build/kernel/linux.sh | 3 2 1 0 +-
/trunk/scripts/build/binutils.sh | 3 2 1 0 +-
/trunk/scripts/build/cc/gcc.sh | 3 2 1 0 +-
/trunk/scripts/build/debug/000-template.sh | 3 2 1 0 +-
/trunk/scripts/build/debug/100-dmalloc.sh | 3 2 1 0 +-
/trunk/scripts/build/debug/400-ltrace.sh | 3 2 1 0 +-
/trunk/scripts/build/debug/300-gdb.sh | 9 6 3 0 +++--
/trunk/scripts/build/debug/500-strace.sh | 7 3 4 0 ++--
/trunk/scripts/build/debug/200-duma.sh | 19 8 11 0 ++++------
/trunk/scripts/build/libc/glibc.sh | 14 12 2 0 ++++++-
/trunk/scripts/build/libc/uClibc.sh | 13 9 4 0 +++++--
/trunk/scripts/build/libc/eglibc.sh | 14 12 2 0 ++++++-
/trunk/scripts/build/gmp.sh | 3 2 1 0 +-
/trunk/scripts/build/mpfr.sh | 3 2 1 0 +-
/trunk/scripts/functions | 68 36 32 0 +++++++++++++++++++-----------------
18 files changed, 108 insertions(+), 69 deletions(-)
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diff -dur strace-4.5.16.orig/process.c strace-4.5.16/process.c
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--- strace-4.5.16.orig/process.c	2007-01-11 23:08:38.000000000 +0100
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+++ strace-4.5.16/process.c	2007-07-14 19:19:58.000000000 +0200
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@@ -2685,7 +2685,6 @@
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        { 4*REG_GBR,            "4*REG_GBR"                             },
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        { 4*REG_MACH,           "4*REG_MACH"                            },
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        { 4*REG_MACL,           "4*REG_MACL"                            },
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-       { 4*REG_SYSCALL,        "4*REG_SYSCALL"                         },
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        { 4*REG_FPUL,           "4*REG_FPUL"                            },
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        { 4*REG_FPREG0,         "4*REG_FPREG0"                          },
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        { 4*(REG_FPREG0+1),     "4*REG_FPREG1"                          },