patches/gcc/3.4.6/160-arm-ldm-peephole2.patch
author Titus von Boxberg <titus@v9g.de>
Mon Aug 22 09:40:31 2011 +0200 (2011-08-22)
branch1.12
changeset 2637 97cc0c987a1a
parent 746 b150d6f590fc
permissions -rw-r--r--
configure: require libtoolize, create wrapper to it

libtoolize must be checked_for and there needs to be a wrapper
that points to GNU libtoolize since that may be installed
as glibtoolize.
This fixes a problem with building Cloog/PPL that was

Reported-by: "Pierrick Brossin" <pierrick@bs-network.net>
Signed-off-by: "Titus von Boxberg" <titus@v9g.de>
(transplanted from c7c9e98d36d8a6a49fcd5f3836d5797bb965eba7)
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diff -durN gcc-3.4.6.orig/gcc/config/arm/arm.c gcc-3.4.6/gcc/config/arm/arm.c
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--- gcc-3.4.6.orig/gcc/config/arm/arm.c	2007-08-15 22:57:51.000000000 +0200
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+++ gcc-3.4.6/gcc/config/arm/arm.c	2007-08-15 22:57:51.000000000 +0200
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@@ -4572,6 +4572,10 @@
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 int
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 adjacent_mem_locations (rtx a, rtx b)
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 {
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+  /* We don't guarantee to preserve the order of these memory refs.  */
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+  if (volatile_refs_p (a) || volatile_refs_p (b))
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+    return 0;
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+
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   if ((GET_CODE (XEXP (a, 0)) == REG
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        || (GET_CODE (XEXP (a, 0)) == PLUS
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 	   && GET_CODE (XEXP (XEXP (a, 0), 1)) == CONST_INT))
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@@ -4611,6 +4615,17 @@
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 	return 0;
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       val_diff = val1 - val0;
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+
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+      if (arm_ld_sched)
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+	{
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+	  /* If the target has load delay slots, then there's no benefit
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+	     to using an ldm instruction unless the offset is zero and
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+	     we are optimizing for size.  */
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+	  return (optimize_size && (REGNO (reg0) == REGNO (reg1))
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+		  && (val0 == 0 || val1 == 0 || val0 == 4 || val1 == 4)
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+		  && (val_diff == 4 || val_diff == -4));
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+	}
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+
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       return ((REGNO (reg0) == REGNO (reg1))
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 	      && (val_diff == 4 || val_diff == -4));
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     }