patches/gcc/4.3.2/380-pr37436.patch
author "Yann E. MORIN" <yann.morin.1998@anciens.enib.fr>
Sun Jul 17 17:54:21 2011 +0200 (2011-07-17)
changeset 2888 dd71df95903a
permissions -rw-r--r--
cc/gcc: pass the companion libs prefix to cc_core

In case of canadian-cross, the companion libraries are not the same for
the core cc (they run on 'build') as they are for the final cc (they run
on 'host').

Prepare for this differentiation (coming later), while retaining the
current behavior (to use the same compblibs).

Signed-off-by: "Yann E. MORIN" <yann.morin.1998@anciens.enib.fr>
thomas@1460
     1
gcc svn 142778:
thomas@1460
     2
thomas@1460
     3
PR target/37436
thomas@1460
     4
* arm.c (arm_legitimate_index): Only accept addresses that are in
thomas@1460
     5
canonical form.
thomas@1460
     6
* predicates.md (arm_reg_or_extendqisi_mem_op): New predicate.
thomas@1460
     7
* arm.md (extendqihi2): Use arm_reg_or_extendqisi_mem_op predicate
thomas@1460
     8
for operand1.
thomas@1460
     9
(extendqisi2): Likewise.
thomas@1460
    10
(arm_extendqisi, arm_extendqisi_v6): Use arm_extendqisi_mem_op
thomas@1460
    11
predicate for operand1.
thomas@1460
    12
thomas@1460
    13
diff -Nura gcc-4.3.3.orig/gcc/config/arm/arm.c gcc-4.3.3/gcc/config/arm/arm.c
thomas@1460
    14
--- gcc-4.3.3.orig/gcc/config/arm/arm.c	2008-06-11 07:52:55.000000000 -0300
thomas@1460
    15
+++ gcc-4.3.3/gcc/config/arm/arm.c	2009-05-21 16:06:45.000000000 -0300
thomas@1460
    16
@@ -3769,6 +3769,7 @@
thomas@1460
    17
       rtx xop1 = XEXP (x, 1);
thomas@1460
    18
 
thomas@1460
    19
       return ((arm_address_register_rtx_p (xop0, strict_p)
thomas@1460
    20
+	       && GET_CODE(xop1) == CONST_INT
thomas@1460
    21
 	       && arm_legitimate_index_p (mode, xop1, outer, strict_p))
thomas@1460
    22
 	      || (arm_address_register_rtx_p (xop1, strict_p)
thomas@1460
    23
 		  && arm_legitimate_index_p (mode, xop0, outer, strict_p)));
thomas@1460
    24
diff -Nura gcc-4.3.3.orig/gcc/config/arm/arm.md gcc-4.3.3/gcc/config/arm/arm.md
thomas@1460
    25
--- gcc-4.3.3.orig/gcc/config/arm/arm.md	2007-09-04 01:44:47.000000000 -0300
thomas@1460
    26
+++ gcc-4.3.3/gcc/config/arm/arm.md	2009-05-21 16:06:45.000000000 -0300
thomas@1460
    27
@@ -4199,7 +4199,7 @@
thomas@1460
    28
 
thomas@1460
    29
 (define_expand "extendqihi2"
thomas@1460
    30
   [(set (match_dup 2)
thomas@1460
    31
-	(ashift:SI (match_operand:QI 1 "general_operand" "")
thomas@1460
    32
+	(ashift:SI (match_operand:QI 1 "arm_reg_or_extendqisi_mem_op" "")
thomas@1460
    33
 		   (const_int 24)))
thomas@1460
    34
    (set (match_operand:HI 0 "s_register_operand" "")
thomas@1460
    35
 	(ashiftrt:SI (match_dup 2)
thomas@1460
    36
@@ -4224,7 +4224,7 @@
thomas@1460
    37
 
thomas@1460
    38
 (define_insn "*arm_extendqihi_insn"
thomas@1460
    39
   [(set (match_operand:HI 0 "s_register_operand" "=r")
thomas@1460
    40
-	(sign_extend:HI (match_operand:QI 1 "memory_operand" "Uq")))]
thomas@1460
    41
+	(sign_extend:HI (match_operand:QI 1 "arm_extendqisi_mem_op" "Uq")))]
thomas@1460
    42
   "TARGET_ARM && arm_arch4"
thomas@1460
    43
   "ldr%(sb%)\\t%0, %1"
thomas@1460
    44
   [(set_attr "type" "load_byte")
thomas@1460
    45
@@ -4235,7 +4235,7 @@
thomas@1460
    46
 
thomas@1460
    47
 (define_expand "extendqisi2"
thomas@1460
    48
   [(set (match_dup 2)
thomas@1460
    49
-	(ashift:SI (match_operand:QI 1 "general_operand" "")
thomas@1460
    50
+	(ashift:SI (match_operand:QI 1 "arm_reg_or_extendqisi_mem_op" "")
thomas@1460
    51
 		   (const_int 24)))
thomas@1460
    52
    (set (match_operand:SI 0 "s_register_operand" "")
thomas@1460
    53
 	(ashiftrt:SI (match_dup 2)
thomas@1460
    54
@@ -4267,7 +4267,7 @@
thomas@1460
    55
 
thomas@1460
    56
 (define_insn "*arm_extendqisi"
thomas@1460
    57
   [(set (match_operand:SI 0 "s_register_operand" "=r")
thomas@1460
    58
-	(sign_extend:SI (match_operand:QI 1 "memory_operand" "Uq")))]
thomas@1460
    59
+	(sign_extend:SI (match_operand:QI 1 "arm_extendqisi_mem_op" "Uq")))]
thomas@1460
    60
   "TARGET_ARM && arm_arch4 && !arm_arch6"
thomas@1460
    61
   "ldr%(sb%)\\t%0, %1"
thomas@1460
    62
   [(set_attr "type" "load_byte")
thomas@1460
    63
@@ -4278,7 +4278,8 @@
thomas@1460
    64
 
thomas@1460
    65
 (define_insn "*arm_extendqisi_v6"
thomas@1460
    66
   [(set (match_operand:SI 0 "s_register_operand" "=r,r")
thomas@1460
    67
-	(sign_extend:SI (match_operand:QI 1 "nonimmediate_operand" "r,Uq")))]
thomas@1460
    68
+	(sign_extend:SI
thomas@1460
    69
+	 (match_operand:QI 1 "arm_reg_or_extendqisi_mem_op" "r,Uq")))]
thomas@1460
    70
   "TARGET_ARM && arm_arch6"
thomas@1460
    71
   "@
thomas@1460
    72
    sxtb%?\\t%0, %1
thomas@1460
    73
diff -Nura gcc-4.3.3.orig/gcc/config/arm/predicates.md gcc-4.3.3/gcc/config/arm/predicates.md
thomas@1460
    74
--- gcc-4.3.3.orig/gcc/config/arm/predicates.md	2007-08-02 07:49:31.000000000 -0300
thomas@1460
    75
+++ gcc-4.3.3/gcc/config/arm/predicates.md	2009-05-21 16:06:45.000000000 -0300
thomas@1460
    76
@@ -234,6 +234,10 @@
thomas@1460
    77
        (match_test "arm_legitimate_address_p (mode, XEXP (op, 0), SIGN_EXTEND,
thomas@1460
    78
 					      0)")))
thomas@1460
    79
 
thomas@1460
    80
+(define_special_predicate "arm_reg_or_extendqisi_mem_op"
thomas@1460
    81
+  (ior (match_operand 0 "arm_extendqisi_mem_op")
thomas@1460
    82
+       (match_operand 0 "s_register_operand")))
thomas@1460
    83
+
thomas@1460
    84
 (define_predicate "power_of_two_operand"
thomas@1460
    85
   (match_code "const_int")
thomas@1460
    86
 {