patches/glibc/2.2.2/glibc-2.2.2-allow-gcc3-longlong.patch
author "Yann E. MORIN" <yann.morin.1998@anciens.enib.fr>
Sat Feb 24 11:00:05 2007 +0000 (2007-02-24)
changeset 1 eeea35fbf182
permissions -rw-r--r--
Add the full crosstool-NG sources to the new repository of its own.
You might just say: 'Yeah! crosstool-NG's got its own repo!".
Unfortunately, that's because the previous repo got damaged beyond repair and I had no backup.
That means I'm putting backups in place in the afternoon.
That also means we've lost history... :-(
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Fixes error
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./longlong.h:423: error: parse error before '%' token
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./longlong.h:423: error: missing terminating " character
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./longlong.h:432: error: missing terminating " character
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See also patches/glibc-2.1.3/glibc-2.1.3-allow-gcc3-longlong.patch
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===================================================================
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--- glibc-2.2.2/stdlib/longlong.h.old	2000-02-11 15:48:58.000000000 -0800
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+++ glibc-2.2.2/stdlib/longlong.h	2005-04-11 15:36:10.000000000 -0700
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@@ -108,8 +108,8 @@
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 #if (defined (__a29k__) || defined (_AM29K)) && W_TYPE_SIZE == 32
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 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
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-  __asm__ ("add %1,%4,%5
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-	addc %0,%2,%3"							\
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+  __asm__ ("add %1,%4,%5\n"           \
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+	"addc %0,%2,%3"							\
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 	   : "=r" ((USItype) (sh)),					\
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 	    "=&r" ((USItype) (sl))					\
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 	   : "%r" ((USItype) (ah)),					\
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@@ -117,8 +117,8 @@
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 	     "%r" ((USItype) (al)),					\
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 	     "rI" ((USItype) (bl)))
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 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
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-  __asm__ ("sub %1,%4,%5
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-	subc %0,%2,%3"							\
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+  __asm__ ("sub %1,%4,%5\n"           \
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+	"subc %0,%2,%3"							\
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 	   : "=r" ((USItype) (sh)),					\
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 	     "=&r" ((USItype) (sl))					\
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 	   : "r" ((USItype) (ah)),					\
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@@ -175,8 +175,8 @@
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 #if defined (__arc__) && W_TYPE_SIZE == 32
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 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
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-  __asm__ ("add.f	%1, %4, %5
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-	adc	%0, %2, %3"						\
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+  __asm__ ("add.f	%1, %4, %5\n"       \
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+	"adc	%0, %2, %3"						\
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 	   : "=r" ((USItype) (sh)),					\
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 	     "=&r" ((USItype) (sl))					\
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 	   : "%r" ((USItype) (ah)),					\
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@@ -184,8 +184,8 @@
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 	     "%r" ((USItype) (al)),					\
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 	     "rIJ" ((USItype) (bl)))
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 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
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-  __asm__ ("sub.f	%1, %4, %5
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-	sbc	%0, %2, %3"						\
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+  __asm__ ("sub.f	%1, %4, %5\n"       \
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+	"sbc	%0, %2, %3"						\
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 	   : "=r" ((USItype) (sh)),					\
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 	     "=&r" ((USItype) (sl))					\
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 	   : "r" ((USItype) (ah)),					\
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@@ -206,8 +206,8 @@
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 #if defined (__arm__) && W_TYPE_SIZE == 32
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 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
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-  __asm__ ("adds	%1, %4, %5
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-	adc	%0, %2, %3"						\
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+  __asm__ ("adds	%1, %4, %5\n"       \
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+	"adc	%0, %2, %3"						\
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 	   : "=r" ((USItype) (sh)),					\
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 	     "=&r" ((USItype) (sl))					\
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 	   : "%r" ((USItype) (ah)),					\
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@@ -215,8 +215,8 @@
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 	     "%r" ((USItype) (al)),					\
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 	     "rI" ((USItype) (bl)))
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 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
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-  __asm__ ("subs	%1, %4, %5
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-	sbc	%0, %2, %3"						\
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+  __asm__ ("subs	%1, %4, %5\n"       \
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+	"sbc	%0, %2, %3"						\
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 	   : "=r" ((USItype) (sh)),					\
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 	     "=&r" ((USItype) (sl))					\
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 	   : "r" ((USItype) (ah)),					\
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@@ -225,19 +225,19 @@
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 	     "rI" ((USItype) (bl)))
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 #define umul_ppmm(xh, xl, a, b) \
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 {register USItype __t0, __t1, __t2;					\
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-  __asm__ ("%@ Inlined umul_ppmm
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-	mov	%2, %5, lsr #16
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-	mov	%0, %6, lsr #16
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-	bic	%3, %5, %2, lsl #16
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-	bic	%4, %6, %0, lsl #16
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-	mul	%1, %3, %4
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-	mul	%4, %2, %4
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-	mul	%3, %0, %3
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-	mul	%0, %2, %0
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-	adds	%3, %4, %3
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-	addcs	%0, %0, #65536
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-	adds	%1, %1, %3, lsl #16
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-	adc	%0, %0, %3, lsr #16"					\
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+  __asm__ ("%@ Inlined umul_ppmm\n"   \
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+	"mov	%2, %5, lsr #16\n"            \
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+	"mov	%0, %6, lsr #16\n"            \
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+	"bic	%3, %5, %2, lsl #16\n"        \
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+	"bic	%4, %6, %0, lsl #16\n"        \
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+	"mul	%1, %3, %4\n"                 \
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+	"mul	%4, %2, %4\n"                 \
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+	"mul	%3, %0, %3\n"                 \
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+	"mul	%0, %2, %0\n"                 \
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+	"adds	%3, %4, %3\n"                 \
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+	"addcs	%0, %0, #65536\n"           \
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+	"adds	%1, %1, %3, lsl #16\n"        \
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+	"adc	%0, %0, %3, lsr #16"					\
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 	   : "=&r" ((USItype) (xh)),					\
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 	     "=r" ((USItype) (xl)),					\
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 	     "=&r" (__t0), "=&r" (__t1), "=r" (__t2)			\
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@@ -277,8 +277,8 @@
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 #if defined (__gmicro__) && W_TYPE_SIZE == 32
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 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
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-  __asm__ ("add.w %5,%1
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-	addx %3,%0"							\
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+  __asm__ ("add.w %5,%1\n"            \
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+	"addx %3,%0"							\
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 	   : "=g" ((USItype) (sh)),					\
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 	     "=&g" ((USItype) (sl))					\
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 	   : "%0" ((USItype) (ah)),					\
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@@ -286,8 +286,8 @@
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 	     "%1" ((USItype) (al)),					\
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 	     "g" ((USItype) (bl)))
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 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
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-  __asm__ ("sub.w %5,%1
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-	subx %3,%0"							\
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+  __asm__ ("sub.w %5,%1\n"            \
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+	"subx %3,%0"							\
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 	   : "=g" ((USItype) (sh)),					\
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 	     "=&g" ((USItype) (sl))					\
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 	   : "0" ((USItype) (ah)),					\
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@@ -316,8 +316,8 @@
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 #if defined (__hppa) && W_TYPE_SIZE == 32
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 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
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-  __asm__ ("add %4,%5,%1
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-	addc %2,%3,%0"							\
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+  __asm__ ("add %4,%5,%1\n"           \
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+	"addc %2,%3,%0"							\
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 	   : "=r" ((USItype) (sh)),					\
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 	     "=&r" ((USItype) (sl))					\
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 	   : "%rM" ((USItype) (ah)),					\
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@@ -325,8 +325,8 @@
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 	     "%rM" ((USItype) (al)),					\
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 	     "rM" ((USItype) (bl)))
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 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
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-  __asm__ ("sub %4,%5,%1
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-	subb %2,%3,%0"							\
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+  __asm__ ("sub %4,%5,%1\n"           \
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+	"subb %2,%3,%0"							\
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 	   : "=r" ((USItype) (sh)),					\
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 	     "=&r" ((USItype) (sl))					\
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 	   : "rM" ((USItype) (ah)),					\
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@@ -357,22 +357,22 @@
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   do {									\
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     USItype __tmp;							\
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     __asm__ (								\
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-       "ldi		1,%0
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-	extru,=		%1,15,16,%%r0		; Bits 31..16 zero?
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-	extru,tr	%1,15,16,%1		; No.  Shift down, skip add.
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-	ldo		16(%0),%0		; Yes.  Perform add.
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-	extru,=		%1,23,8,%%r0		; Bits 15..8 zero?
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-	extru,tr	%1,23,8,%1		; No.  Shift down, skip add.
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-	ldo		8(%0),%0		; Yes.  Perform add.
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-	extru,=		%1,27,4,%%r0		; Bits 7..4 zero?
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-	extru,tr	%1,27,4,%1		; No.  Shift down, skip add.
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-	ldo		4(%0),%0		; Yes.  Perform add.
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-	extru,=		%1,29,2,%%r0		; Bits 3..2 zero?
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-	extru,tr	%1,29,2,%1		; No.  Shift down, skip add.
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-	ldo		2(%0),%0		; Yes.  Perform add.
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-	extru		%1,30,1,%1		; Extract bit 1.
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-	sub		%0,%1,%0		; Subtract it.
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-	" : "=r" (count), "=r" (__tmp) : "1" (x));			\
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+       "ldi		1,%0\n"                                        \
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+	"extru,=		%1,15,16,%%r0		; Bits 31..16 zero?\n"         \
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+	"extru,tr	%1,15,16,%1		; No.  Shift down, skip add.\n"    \
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+	"ldo		16(%0),%0		; Yes.  Perform add.\n"                \
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+	"extru,=		%1,23,8,%%r0		; Bits 15..8 zero?\n"          \
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+	"extru,tr	%1,23,8,%1		; No.  Shift down, skip add.\n"    \
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+	"ldo		8(%0),%0		; Yes.  Perform add.\n"                \
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+	"extru,=		%1,27,4,%%r0		; Bits 7..4 zero?\n"           \
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+	"extru,tr	%1,27,4,%1		; No.  Shift down, skip add.\n"    \
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+	"ldo		4(%0),%0		; Yes.  Perform add.\n"                \
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+	"extru,=		%1,29,2,%%r0		; Bits 3..2 zero?\n"           \
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+	"extru,tr	%1,29,2,%1		; No.  Shift down, skip add.\n"    \
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+	"ldo		2(%0),%0		; Yes.  Perform add.\n"                \
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+	"extru		%1,30,1,%1		; Extract bit 1.\n"                \
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+	"sub		%0,%1,%0		; Subtract it.\n"                      \
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+	: "=r" (count), "=r" (__tmp) : "1" (x));			\
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   } while (0)
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 #endif
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@@ -419,8 +419,8 @@
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 #if (defined (__i386__) || defined (__i486__)) && W_TYPE_SIZE == 32
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 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
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-  __asm__ ("addl %5,%1
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-	adcl %3,%0"							\
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+  __asm__ ("addl %5,%1\n"             \
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+	"adcl %3,%0"							\
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 	   : "=r" ((USItype) (sh)),					\
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 	     "=&r" ((USItype) (sl))					\
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 	   : "%0" ((USItype) (ah)),					\
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@@ -428,8 +428,8 @@
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 	     "%1" ((USItype) (al)),					\
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 	     "g" ((USItype) (bl)))
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 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
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-  __asm__ ("subl %5,%1
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-	sbbl %3,%0"							\
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+  __asm__ ("subl %5,%1\n"             \
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+	"sbbl %3,%0"							\
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 	   : "=r" ((USItype) (sh)),					\
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 	     "=&r" ((USItype) (sl))					\
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 	   : "0" ((USItype) (ah)),					\
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@@ -525,9 +525,9 @@
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 #if defined (__M32R__) && W_TYPE_SIZE == 32
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 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
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   /* The cmp clears the condition bit.  */ \
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-  __asm__ ("cmp %0,%0
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-	addx %%5,%1
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-	addx %%3,%0"							\
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+  __asm__ ("cmp %0,%0\n"              \
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+	"addx %%5,%1\n"                     \
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+	"addx %%3,%0"							\
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 	   : "=r" ((USItype) (sh)),					\
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 	     "=&r" ((USItype) (sl))					\
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 	   : "%0" ((USItype) (ah)),					\
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@@ -537,9 +537,9 @@
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 	   : "cbit")
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 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
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   /* The cmp clears the condition bit.  */ \
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-  __asm__ ("cmp %0,%0
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-	subx %5,%1
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-	subx %3,%0"							\
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+  __asm__ ("cmp %0,%0\n"              \
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+	"subx %5,%1\n"                      \
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+	"subx %3,%0"							\
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 	   : "=r" ((USItype) (sh)),					\
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 	     "=&r" ((USItype) (sl))					\
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 	   : "0" ((USItype) (ah)),					\
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@@ -551,8 +551,8 @@
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   241
 
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 #if defined (__mc68000__) && W_TYPE_SIZE == 32
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 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
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-  __asm__ ("add%.l %5,%1
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-	addx%.l %3,%0"							\
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   246
+  __asm__ ("add%.l %5,%1\n"           \
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   247
+	"addx%.l %3,%0"							\
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 	   : "=d" ((USItype) (sh)),					\
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   249
 	     "=&d" ((USItype) (sl))					\
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 	   : "%0" ((USItype) (ah)),					\
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@@ -560,8 +560,8 @@
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 	     "%1" ((USItype) (al)),					\
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 	     "g" ((USItype) (bl)))
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 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
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   255
-  __asm__ ("sub%.l %5,%1
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   256
-	subx%.l %3,%0"							\
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   257
+  __asm__ ("sub%.l %5,%1\n"           \
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   258
+	"subx%.l %3,%0"							\
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   259
 	   : "=d" ((USItype) (sh)),					\
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   260
 	     "=&d" ((USItype) (sl))					\
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   261
 	   : "0" ((USItype) (ah)),					\
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   262
@@ -602,32 +602,32 @@
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   263
 #if !defined(__mcf5200__)
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   264
 /* %/ inserts REGISTER_PREFIX, %# inserts IMMEDIATE_PREFIX.  */
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   265
 #define umul_ppmm(xh, xl, a, b) \
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   266
-  __asm__ ("| Inlined umul_ppmm
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   267
-	move%.l	%2,%/d0
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-	move%.l	%3,%/d1
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   269
-	move%.l	%/d0,%/d2
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-	swap	%/d0
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-	move%.l	%/d1,%/d3
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   272
-	swap	%/d1
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-	move%.w	%/d2,%/d4
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   274
-	mulu	%/d3,%/d4
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   275
-	mulu	%/d1,%/d2
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   276
-	mulu	%/d0,%/d3
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-	mulu	%/d0,%/d1
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-	move%.l	%/d4,%/d0
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-	eor%.w	%/d0,%/d0
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-	swap	%/d0
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   281
-	add%.l	%/d0,%/d2
yann@1
   282
-	add%.l	%/d3,%/d2
yann@1
   283
-	jcc	1f
yann@1
   284
-	add%.l	%#65536,%/d1
yann@1
   285
-1:	swap	%/d2
yann@1
   286
-	moveq	%#0,%/d0
yann@1
   287
-	move%.w	%/d2,%/d0
yann@1
   288
-	move%.w	%/d4,%/d2
yann@1
   289
-	move%.l	%/d2,%1
yann@1
   290
-	add%.l	%/d1,%/d0
yann@1
   291
-	move%.l	%/d0,%0"						\
yann@1
   292
+  __asm__ ("| Inlined umul_ppmm\n"    \
yann@1
   293
+	"move%.l	%2,%/d0\n"                \
yann@1
   294
+	"move%.l	%3,%/d1\n"                \
yann@1
   295
+	"move%.l	%/d0,%/d2\n"              \
yann@1
   296
+	"swap	%/d0\n"                       \
yann@1
   297
+	"move%.l	%/d1,%/d3\n"              \
yann@1
   298
+	"swap	%/d1\n"                       \
yann@1
   299
+	"move%.w	%/d2,%/d4\n"              \
yann@1
   300
+	"mulu	%/d3,%/d4\n"                  \
yann@1
   301
+	"mulu	%/d1,%/d2\n"                  \
yann@1
   302
+	"mulu	%/d0,%/d3\n"                  \
yann@1
   303
+	"mulu	%/d0,%/d1\n"                  \
yann@1
   304
+	"move%.l	%/d4,%/d0\n"              \
yann@1
   305
+	"eor%.w	%/d0,%/d0\n"                \
yann@1
   306
+	"swap	%/d0\n"                       \
yann@1
   307
+	"add%.l	%/d0,%/d2\n"                \
yann@1
   308
+	"add%.l	%/d3,%/d2\n"                \
yann@1
   309
+	"jcc	1f\n"                         \
yann@1
   310
+	"add%.l	%#65536,%/d1\n"             \
yann@1
   311
+"1:	swap	%/d2\n"                     \
yann@1
   312
+	"moveq	%#0,%/d0\n"                 \
yann@1
   313
+	"move%.w	%/d2,%/d0\n"              \
yann@1
   314
+	"move%.w	%/d4,%/d2\n"              \
yann@1
   315
+	"move%.l	%/d2,%1\n"                \
yann@1
   316
+	"add%.l	%/d1,%/d0\n"                \
yann@1
   317
+	"move%.l	%/d0,%0"						\
yann@1
   318
 	   : "=g" ((USItype) (xh)),					\
yann@1
   319
 	     "=g" ((USItype) (xl))					\
yann@1
   320
 	   : "g" ((USItype) (a)),					\
yann@1
   321
@@ -653,8 +653,8 @@
yann@1
   322
 
yann@1
   323
 #if defined (__m88000__) && W_TYPE_SIZE == 32
yann@1
   324
 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
yann@1
   325
-  __asm__ ("addu.co %1,%r4,%r5
yann@1
   326
-	addu.ci %0,%r2,%r3"						\
yann@1
   327
+  __asm__ ("addu.co %1,%r4,%r5\n"     \
yann@1
   328
+	"addu.ci %0,%r2,%r3"						\
yann@1
   329
 	   : "=r" ((USItype) (sh)),					\
yann@1
   330
 	     "=&r" ((USItype) (sl))					\
yann@1
   331
 	   : "%rJ" ((USItype) (ah)),					\
yann@1
   332
@@ -662,8 +662,8 @@
yann@1
   333
 	     "%rJ" ((USItype) (al)),					\
yann@1
   334
 	     "rJ" ((USItype) (bl)))
yann@1
   335
 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
yann@1
   336
-  __asm__ ("subu.co %1,%r4,%r5
yann@1
   337
-	subu.ci %0,%r2,%r3"						\
yann@1
   338
+  __asm__ ("subu.co %1,%r4,%r5\n"     \
yann@1
   339
+	"subu.ci %0,%r2,%r3"						\
yann@1
   340
 	   : "=r" ((USItype) (sh)),					\
yann@1
   341
 	     "=&r" ((USItype) (sl))					\
yann@1
   342
 	   : "rJ" ((USItype) (ah)),					\
yann@1
   343
@@ -880,8 +880,8 @@
yann@1
   344
 
yann@1
   345
 #if defined (__pyr__) && W_TYPE_SIZE == 32
yann@1
   346
 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
yann@1
   347
-  __asm__ ("addw	%5,%1
yann@1
   348
-	addwc	%3,%0"							\
yann@1
   349
+  __asm__ ("addw	%5,%1\n"            \
yann@1
   350
+	"addwc	%3,%0"							\
yann@1
   351
 	   : "=r" ((USItype) (sh)),					\
yann@1
   352
 	     "=&r" ((USItype) (sl))					\
yann@1
   353
 	   : "%0" ((USItype) (ah)),					\
yann@1
   354
@@ -889,8 +889,8 @@
yann@1
   355
 	     "%1" ((USItype) (al)),					\
yann@1
   356
 	     "g" ((USItype) (bl)))
yann@1
   357
 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
yann@1
   358
-  __asm__ ("subw	%5,%1
yann@1
   359
-	subwb	%3,%0"							\
yann@1
   360
+  __asm__ ("subw	%5,%1\n"            \
yann@1
   361
+	"subwb	%3,%0"							\
yann@1
   362
 	   : "=r" ((USItype) (sh)),					\
yann@1
   363
 	     "=&r" ((USItype) (sl))					\
yann@1
   364
 	   : "0" ((USItype) (ah)),					\
yann@1
   365
@@ -902,8 +902,8 @@
yann@1
   366
   ({union {UDItype __ll;						\
yann@1
   367
 	   struct {USItype __h, __l;} __i;				\
yann@1
   368
 	  } __xx;							\
yann@1
   369
-  __asm__ ("movw %1,%R0
yann@1
   370
-	uemul %2,%0"							\
yann@1
   371
+  __asm__ ("movw %1,%R0\n"          \
yann@1
   372
+	"uemul %2,%0"							\
yann@1
   373
 	   : "=&r" (__xx.__ll)						\
yann@1
   374
 	   : "g" ((USItype) (u)),					\
yann@1
   375
 	     "g" ((USItype) (v)));					\
yann@1
   376
@@ -912,8 +912,8 @@
yann@1
   377
 
yann@1
   378
 #if defined (__ibm032__) /* RT/ROMP */ && W_TYPE_SIZE == 32
yann@1
   379
 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
yann@1
   380
-  __asm__ ("a %1,%5
yann@1
   381
-	ae %0,%3"							\
yann@1
   382
+  __asm__ ("a %1,%5\n"                \
yann@1
   383
+	"ae %0,%3"							\
yann@1
   384
 	   : "=r" ((USItype) (sh)),					\
yann@1
   385
 	     "=&r" ((USItype) (sl))					\
yann@1
   386
 	   : "%0" ((USItype) (ah)),					\
yann@1
   387
@@ -921,8 +921,8 @@
yann@1
   388
 	     "%1" ((USItype) (al)),					\
yann@1
   389
 	     "r" ((USItype) (bl)))
yann@1
   390
 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
yann@1
   391
-  __asm__ ("s %1,%5
yann@1
   392
-	se %0,%3"							\
yann@1
   393
+  __asm__ ("s %1,%5\n"                \
yann@1
   394
+	"se %0,%3"							\
yann@1
   395
 	   : "=r" ((USItype) (sh)),					\
yann@1
   396
 	     "=&r" ((USItype) (sl))					\
yann@1
   397
 	   : "0" ((USItype) (ah)),					\
yann@1
   398
@@ -933,26 +933,26 @@
yann@1
   399
   do {									\
yann@1
   400
     USItype __m0 = (m0), __m1 = (m1);					\
yann@1
   401
     __asm__ (								\
yann@1
   402
-       "s	r2,r2
yann@1
   403
-	mts	r10,%2
yann@1
   404
-	m	r2,%3
yann@1
   405
-	m	r2,%3
yann@1
   406
-	m	r2,%3
yann@1
   407
-	m	r2,%3
yann@1
   408
-	m	r2,%3
yann@1
   409
-	m	r2,%3
yann@1
   410
-	m	r2,%3
yann@1
   411
-	m	r2,%3
yann@1
   412
-	m	r2,%3
yann@1
   413
-	m	r2,%3
yann@1
   414
-	m	r2,%3
yann@1
   415
-	m	r2,%3
yann@1
   416
-	m	r2,%3
yann@1
   417
-	m	r2,%3
yann@1
   418
-	m	r2,%3
yann@1
   419
-	m	r2,%3
yann@1
   420
-	cas	%0,r2,r0
yann@1
   421
-	mfs	r10,%1"							\
yann@1
   422
+       "s	r2,r2\n"
yann@1
   423
+	"mts	r10,%2\n"                       \
yann@1
   424
+	"m	r2,%3\n"                          \
yann@1
   425
+	"m	r2,%3\n"                          \
yann@1
   426
+	"m	r2,%3\n"                          \
yann@1
   427
+	"m	r2,%3\n"                          \
yann@1
   428
+	"m	r2,%3\n"                          \
yann@1
   429
+	"m	r2,%3\n"                          \
yann@1
   430
+	"m	r2,%3\n"                          \
yann@1
   431
+	"m	r2,%3\n"                          \
yann@1
   432
+	"m	r2,%3\n"                          \
yann@1
   433
+	"m	r2,%3\n"                          \
yann@1
   434
+	"m	r2,%3\n"                          \
yann@1
   435
+	"m	r2,%3\n"                          \
yann@1
   436
+	"m	r2,%3\n"                          \
yann@1
   437
+	"m	r2,%3\n"                          \
yann@1
   438
+	"m	r2,%3\n"                          \
yann@1
   439
+	"m	r2,%3\n"                          \
yann@1
   440
+	"cas	%0,r2,r0\n"                     \
yann@1
   441
+	"mfs	r10,%1"							\
yann@1
   442
 	     : "=r" ((USItype) (ph)),					\
yann@1
   443
 	       "=r" ((USItype) (pl))					\
yann@1
   444
 	     : "%r" (__m0),						\
yann@1
   445
@@ -982,9 +982,9 @@
yann@1
   446
 #if defined (__sh2__) && W_TYPE_SIZE == 32
yann@1
   447
 #define umul_ppmm(w1, w0, u, v) \
yann@1
   448
   __asm__ (								\
yann@1
   449
-       "dmulu.l	%2,%3
yann@1
   450
-	sts	macl,%1
yann@1
   451
-	sts	mach,%0"						\
yann@1
   452
+       "dmulu.l	%2,%3\n"            \
yann@1
   453
+	"sts	macl,%1\n"                  \
yann@1
   454
+	"sts	mach,%0"						\
yann@1
   455
 	   : "=r" ((USItype)(w1)),					\
yann@1
   456
 	     "=r" ((USItype)(w0))					\
yann@1
   457
 	   : "r" ((USItype)(u)),					\
yann@1
   458
@@ -996,8 +996,8 @@
yann@1
   459
 #if defined (__sparc__) && !defined(__arch64__) \
yann@1
   460
     && !defined(__sparcv9) && W_TYPE_SIZE == 32
yann@1
   461
 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
yann@1
   462
-  __asm__ ("addcc %r4,%5,%1
yann@1
   463
-	addx %r2,%3,%0"							\
yann@1
   464
+  __asm__ ("addcc %r4,%5,%1\n"        \
yann@1
   465
+	"addx %r2,%3,%0"							\
yann@1
   466
 	   : "=r" ((USItype) (sh)),					\
yann@1
   467
 	     "=&r" ((USItype) (sl))					\
yann@1
   468
 	   : "%rJ" ((USItype) (ah)),					\
yann@1
   469
@@ -1006,8 +1006,8 @@
yann@1
   470
 	     "rI" ((USItype) (bl))					\
yann@1
   471
 	   __CLOBBER_CC)
yann@1
   472
 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
yann@1
   473
-  __asm__ ("subcc %r4,%5,%1
yann@1
   474
-	subx %r2,%3,%0"							\
yann@1
   475
+  __asm__ ("subcc %r4,%5,%1\n"        \
yann@1
   476
+	"subx %r2,%3,%0"							\
yann@1
   477
 	   : "=r" ((USItype) (sh)),					\
yann@1
   478
 	     "=&r" ((USItype) (sl))					\
yann@1
   479
 	   : "rJ" ((USItype) (ah)),					\
yann@1
   480
@@ -1040,45 +1040,45 @@
yann@1
   481
 	   : "r" ((USItype) (u)),					\
yann@1
   482
 	     "r" ((USItype) (v)))
yann@1
   483
 #define udiv_qrnnd(q, r, n1, n0, d) \
yann@1
   484
-  __asm__ ("! Inlined udiv_qrnnd
yann@1
   485
-	wr	%%g0,%2,%%y	! Not a delayed write for sparclite
yann@1
   486
-	tst	%%g0
yann@1
   487
-	divscc	%3,%4,%%g1
yann@1
   488
-	divscc	%%g1,%4,%%g1
yann@1
   489
-	divscc	%%g1,%4,%%g1
yann@1
   490
-	divscc	%%g1,%4,%%g1
yann@1
   491
-	divscc	%%g1,%4,%%g1
yann@1
   492
-	divscc	%%g1,%4,%%g1
yann@1
   493
-	divscc	%%g1,%4,%%g1
yann@1
   494
-	divscc	%%g1,%4,%%g1
yann@1
   495
-	divscc	%%g1,%4,%%g1
yann@1
   496
-	divscc	%%g1,%4,%%g1
yann@1
   497
-	divscc	%%g1,%4,%%g1
yann@1
   498
-	divscc	%%g1,%4,%%g1
yann@1
   499
-	divscc	%%g1,%4,%%g1
yann@1
   500
-	divscc	%%g1,%4,%%g1
yann@1
   501
-	divscc	%%g1,%4,%%g1
yann@1
   502
-	divscc	%%g1,%4,%%g1
yann@1
   503
-	divscc	%%g1,%4,%%g1
yann@1
   504
-	divscc	%%g1,%4,%%g1
yann@1
   505
-	divscc	%%g1,%4,%%g1
yann@1
   506
-	divscc	%%g1,%4,%%g1
yann@1
   507
-	divscc	%%g1,%4,%%g1
yann@1
   508
-	divscc	%%g1,%4,%%g1
yann@1
   509
-	divscc	%%g1,%4,%%g1
yann@1
   510
-	divscc	%%g1,%4,%%g1
yann@1
   511
-	divscc	%%g1,%4,%%g1
yann@1
   512
-	divscc	%%g1,%4,%%g1
yann@1
   513
-	divscc	%%g1,%4,%%g1
yann@1
   514
-	divscc	%%g1,%4,%%g1
yann@1
   515
-	divscc	%%g1,%4,%%g1
yann@1
   516
-	divscc	%%g1,%4,%%g1
yann@1
   517
-	divscc	%%g1,%4,%%g1
yann@1
   518
-	divscc	%%g1,%4,%0
yann@1
   519
-	rd	%%y,%1
yann@1
   520
-	bl,a 1f
yann@1
   521
-	add	%1,%4,%1
yann@1
   522
-1:	! End of inline udiv_qrnnd"					\
yann@1
   523
+  __asm__ ("! Inlined udiv_qrnnd\n"                      \
yann@1
   524
+	"wr	%%g0,%2,%%y	! Not a delayed write for sparclite\n" \
yann@1
   525
+	"tst	%%g0\n"                                          \
yann@1
   526
+	"divscc	%3,%4,%%g1\n"                                  \
yann@1
   527
+	"divscc	%%g1,%4,%%g1\n"                                \
yann@1
   528
+	"divscc	%%g1,%4,%%g1\n"                                \
yann@1
   529
+	"divscc	%%g1,%4,%%g1\n"                                \
yann@1
   530
+	"divscc	%%g1,%4,%%g1\n"                                \
yann@1
   531
+	"divscc	%%g1,%4,%%g1\n"                                \
yann@1
   532
+	"divscc	%%g1,%4,%%g1\n"                                \
yann@1
   533
+	"divscc	%%g1,%4,%%g1\n"                                \
yann@1
   534
+	"divscc	%%g1,%4,%%g1\n"                                \
yann@1
   535
+	"divscc	%%g1,%4,%%g1\n"                                \
yann@1
   536
+	"divscc	%%g1,%4,%%g1\n"                                \
yann@1
   537
+	"divscc	%%g1,%4,%%g1\n"                                \
yann@1
   538
+	"divscc	%%g1,%4,%%g1\n"                                \
yann@1
   539
+	"divscc	%%g1,%4,%%g1\n"                                \
yann@1
   540
+	"divscc	%%g1,%4,%%g1\n"                                \
yann@1
   541
+	"divscc	%%g1,%4,%%g1\n"                                \
yann@1
   542
+	"divscc	%%g1,%4,%%g1\n"                                \
yann@1
   543
+	"divscc	%%g1,%4,%%g1\n"                                \
yann@1
   544
+	"divscc	%%g1,%4,%%g1\n"                                \
yann@1
   545
+	"divscc	%%g1,%4,%%g1\n"                                \
yann@1
   546
+	"divscc	%%g1,%4,%%g1\n"                                \
yann@1
   547
+	"divscc	%%g1,%4,%%g1\n"                                \
yann@1
   548
+	"divscc	%%g1,%4,%%g1\n"                                \
yann@1
   549
+	"divscc	%%g1,%4,%%g1\n"                                \
yann@1
   550
+	"divscc	%%g1,%4,%%g1\n"                                \
yann@1
   551
+	"divscc	%%g1,%4,%%g1\n"                                \
yann@1
   552
+	"divscc	%%g1,%4,%%g1\n"                                \
yann@1
   553
+	"divscc	%%g1,%4,%%g1\n"                                \
yann@1
   554
+	"divscc	%%g1,%4,%%g1\n"                                \
yann@1
   555
+	"divscc	%%g1,%4,%%g1\n"                                \
yann@1
   556
+	"divscc	%%g1,%4,%%g1\n"                                \
yann@1
   557
+	"divscc	%%g1,%4,%0\n"                                  \
yann@1
   558
+	"rd	%%y,%1\n"                                          \
yann@1
   559
+	"bl,a 1f\n"                                            \
yann@1
   560
+	"add	%1,%4,%1\n"                                      \
yann@1
   561
+"1:	! End of inline udiv_qrnnd"					\
yann@1
   562
 	   : "=r" ((USItype) (q)),					\
yann@1
   563
 	     "=r" ((USItype) (r))					\
yann@1
   564
 	   : "r" ((USItype) (n1)),					\
yann@1
   565
@@ -1099,46 +1099,46 @@
yann@1
   566
 /* SPARC without integer multiplication and divide instructions.
yann@1
   567
    (i.e. at least Sun4/20,40,60,65,75,110,260,280,330,360,380,470,490) */
yann@1
   568
 #define umul_ppmm(w1, w0, u, v) \
yann@1
   569
-  __asm__ ("! Inlined umul_ppmm
yann@1
   570
-	wr	%%g0,%2,%%y	! SPARC has 0-3 delay insn after a wr
yann@1
   571
-	sra	%3,31,%%o5	! Don't move this insn
yann@1
   572
-	and	%2,%%o5,%%o5	! Don't move this insn
yann@1
   573
-	andcc	%%g0,0,%%g1	! Don't move this insn
yann@1
   574
-	mulscc	%%g1,%3,%%g1
yann@1
   575
-	mulscc	%%g1,%3,%%g1
yann@1
   576
-	mulscc	%%g1,%3,%%g1
yann@1
   577
-	mulscc	%%g1,%3,%%g1
yann@1
   578
-	mulscc	%%g1,%3,%%g1
yann@1
   579
-	mulscc	%%g1,%3,%%g1
yann@1
   580
-	mulscc	%%g1,%3,%%g1
yann@1
   581
-	mulscc	%%g1,%3,%%g1
yann@1
   582
-	mulscc	%%g1,%3,%%g1
yann@1
   583
-	mulscc	%%g1,%3,%%g1
yann@1
   584
-	mulscc	%%g1,%3,%%g1
yann@1
   585
-	mulscc	%%g1,%3,%%g1
yann@1
   586
-	mulscc	%%g1,%3,%%g1
yann@1
   587
-	mulscc	%%g1,%3,%%g1
yann@1
   588
-	mulscc	%%g1,%3,%%g1
yann@1
   589
-	mulscc	%%g1,%3,%%g1
yann@1
   590
-	mulscc	%%g1,%3,%%g1
yann@1
   591
-	mulscc	%%g1,%3,%%g1
yann@1
   592
-	mulscc	%%g1,%3,%%g1
yann@1
   593
-	mulscc	%%g1,%3,%%g1
yann@1
   594
-	mulscc	%%g1,%3,%%g1
yann@1
   595
-	mulscc	%%g1,%3,%%g1
yann@1
   596
-	mulscc	%%g1,%3,%%g1
yann@1
   597
-	mulscc	%%g1,%3,%%g1
yann@1
   598
-	mulscc	%%g1,%3,%%g1
yann@1
   599
-	mulscc	%%g1,%3,%%g1
yann@1
   600
-	mulscc	%%g1,%3,%%g1
yann@1
   601
-	mulscc	%%g1,%3,%%g1
yann@1
   602
-	mulscc	%%g1,%3,%%g1
yann@1
   603
-	mulscc	%%g1,%3,%%g1
yann@1
   604
-	mulscc	%%g1,%3,%%g1
yann@1
   605
-	mulscc	%%g1,%3,%%g1
yann@1
   606
-	mulscc	%%g1,0,%%g1
yann@1
   607
-	add	%%g1,%%o5,%0
yann@1
   608
-	rd	%%y,%1"							\
yann@1
   609
+  __asm__ ("! Inlined umul_ppmm\n"                         \
yann@1
   610
+	"wr	%%g0,%2,%%y	! SPARC has 0-3 delay insn after a wr\n" \
yann@1
   611
+	"sra	%3,31,%%o5	! Don't move this insn\n"              \
yann@1
   612
+	"and	%2,%%o5,%%o5	! Don't move this insn\n"            \
yann@1
   613
+	"andcc	%%g0,0,%%g1	! Don't move this insn\n"            \
yann@1
   614
+	"mulscc	%%g1,%3,%%g1\n"                                  \
yann@1
   615
+	"mulscc	%%g1,%3,%%g1\n"                                  \
yann@1
   616
+	"mulscc	%%g1,%3,%%g1\n"                                  \
yann@1
   617
+	"mulscc	%%g1,%3,%%g1\n"                                  \
yann@1
   618
+	"mulscc	%%g1,%3,%%g1\n"                                  \
yann@1
   619
+	"mulscc	%%g1,%3,%%g1\n"                                  \
yann@1
   620
+	"mulscc	%%g1,%3,%%g1\n"                                  \
yann@1
   621
+	"mulscc	%%g1,%3,%%g1\n"                                  \
yann@1
   622
+	"mulscc	%%g1,%3,%%g1\n"                                  \
yann@1
   623
+	"mulscc	%%g1,%3,%%g1\n"                                  \
yann@1
   624
+	"mulscc	%%g1,%3,%%g1\n"                                  \
yann@1
   625
+	"mulscc	%%g1,%3,%%g1\n"                                  \
yann@1
   626
+	"mulscc	%%g1,%3,%%g1\n"                                  \
yann@1
   627
+	"mulscc	%%g1,%3,%%g1\n"                                  \
yann@1
   628
+	"mulscc	%%g1,%3,%%g1\n"                                  \
yann@1
   629
+	"mulscc	%%g1,%3,%%g1\n"                                  \
yann@1
   630
+	"mulscc	%%g1,%3,%%g1\n"                                  \
yann@1
   631
+	"mulscc	%%g1,%3,%%g1\n"                                  \
yann@1
   632
+	"mulscc	%%g1,%3,%%g1\n"                                  \
yann@1
   633
+	"mulscc	%%g1,%3,%%g1\n"                                  \
yann@1
   634
+	"mulscc	%%g1,%3,%%g1\n"                                  \
yann@1
   635
+	"mulscc	%%g1,%3,%%g1\n"                                  \
yann@1
   636
+	"mulscc	%%g1,%3,%%g1\n"                                  \
yann@1
   637
+	"mulscc	%%g1,%3,%%g1\n"                                  \
yann@1
   638
+	"mulscc	%%g1,%3,%%g1\n"                                  \
yann@1
   639
+	"mulscc	%%g1,%3,%%g1\n"                                  \
yann@1
   640
+	"mulscc	%%g1,%3,%%g1\n"                                  \
yann@1
   641
+	"mulscc	%%g1,%3,%%g1\n"                                  \
yann@1
   642
+	"mulscc	%%g1,%3,%%g1\n"                                  \
yann@1
   643
+	"mulscc	%%g1,%3,%%g1\n"                                  \
yann@1
   644
+	"mulscc	%%g1,%3,%%g1\n"                                  \
yann@1
   645
+	"mulscc	%%g1,%3,%%g1\n"                                  \
yann@1
   646
+	"mulscc	%%g1,0,%%g1\n"                                   \
yann@1
   647
+	"add	%%g1,%%o5,%0\n"                                    \
yann@1
   648
+	"rd	%%y,%1"							\
yann@1
   649
 	   : "=r" ((USItype) (w1)),					\
yann@1
   650
 	     "=r" ((USItype) (w0))					\
yann@1
   651
 	   : "%rI" ((USItype) (u)),					\
yann@1
   652
@@ -1148,30 +1148,30 @@
yann@1
   653
 /* It's quite necessary to add this much assembler for the sparc.
yann@1
   654
    The default udiv_qrnnd (in C) is more than 10 times slower!  */
yann@1
   655
 #define udiv_qrnnd(q, r, n1, n0, d) \
yann@1
   656
-  __asm__ ("! Inlined udiv_qrnnd
yann@1
   657
-	mov	32,%%g1
yann@1
   658
-	subcc	%1,%2,%%g0
yann@1
   659
-1:	bcs	5f
yann@1
   660
-	 addxcc %0,%0,%0	! shift n1n0 and a q-bit in lsb
yann@1
   661
-	sub	%1,%2,%1	! this kills msb of n
yann@1
   662
-	addx	%1,%1,%1	! so this can't give carry
yann@1
   663
-	subcc	%%g1,1,%%g1
yann@1
   664
-2:	bne	1b
yann@1
   665
-	 subcc	%1,%2,%%g0
yann@1
   666
-	bcs	3f
yann@1
   667
-	 addxcc %0,%0,%0	! shift n1n0 and a q-bit in lsb
yann@1
   668
-	b	3f
yann@1
   669
-	 sub	%1,%2,%1	! this kills msb of n
yann@1
   670
-4:	sub	%1,%2,%1
yann@1
   671
-5:	addxcc	%1,%1,%1
yann@1
   672
-	bcc	2b
yann@1
   673
-	 subcc	%%g1,1,%%g1
yann@1
   674
-! Got carry from n.  Subtract next step to cancel this carry.
yann@1
   675
-	bne	4b
yann@1
   676
-	 addcc	%0,%0,%0	! shift n1n0 and a 0-bit in lsb
yann@1
   677
-	sub	%1,%2,%1
yann@1
   678
-3:	xnor	%0,0,%0
yann@1
   679
-	! End of inline udiv_qrnnd"					\
yann@1
   680
+  __asm__ ("! Inlined udiv_qrnnd\n"                                 \
yann@1
   681
+	"mov	32,%%g1\n"                                                  \
yann@1
   682
+	"subcc	%1,%2,%%g0\n"                                             \
yann@1
   683
+"1:	bcs	5f\n"                                                       \
yann@1
   684
+	 "addxcc %0,%0,%0	! shift n1n0 and a q-bit in lsb\n"              \
yann@1
   685
+	"sub	%1,%2,%1	! this kills msb of n\n"                          \
yann@1
   686
+	"addx	%1,%1,%1	! so this can't give carry\n"                     \
yann@1
   687
+	"subcc	%%g1,1,%%g1\n"                                            \
yann@1
   688
+"2:	bne	1b\n"                                                       \
yann@1
   689
+	 "subcc	%1,%2,%%g0\n"                                             \
yann@1
   690
+	"bcs	3f\n"                                                       \
yann@1
   691
+	 "addxcc %0,%0,%0	! shift n1n0 and a q-bit in lsb\n"              \
yann@1
   692
+	"b	3f\n"                                                         \
yann@1
   693
+	 "sub	%1,%2,%1	! this kills msb of n\n"                          \
yann@1
   694
+"4:	sub	%1,%2,%1\n"                                                 \
yann@1
   695
+"5:	addxcc	%1,%1,%1\n"                                             \
yann@1
   696
+	"bcc	2b\n"                                                       \
yann@1
   697
+	 "subcc	%%g1,1,%%g1\n"                                            \
yann@1
   698
+"! Got carry from n.  Subtract next step to cancel this carry.\n"   \
yann@1
   699
+	"bne	4b\n"                                                       \
yann@1
   700
+	 "addcc	%0,%0,%0	! shift n1n0 and a 0-bit in lsb\n"              \
yann@1
   701
+	"sub	%1,%2,%1\n"                                                 \
yann@1
   702
+"3:	xnor	%0,0,%0\n"                                                \
yann@1
   703
+	"! End of inline udiv_qrnnd"					\
yann@1
   704
 	   : "=&r" ((USItype) (q)),					\
yann@1
   705
 	     "=&r" ((USItype) (r))					\
yann@1
   706
 	   : "r" ((USItype) (d)),					\
yann@1
   707
@@ -1185,11 +1185,11 @@
yann@1
   708
 #if ((defined (__sparc__) && defined (__arch64__)) \
yann@1
   709
      || defined (__sparcv9)) && W_TYPE_SIZE == 64
yann@1
   710
 #define add_ssaaaa(sh, sl, ah, al, bh, bl)				\
yann@1
   711
-  __asm__ ("addcc %r4,%5,%1
yann@1
   712
-  	    add %r2,%3,%0
yann@1
   713
-  	    bcs,a,pn %%xcc, 1f
yann@1
   714
-  	    add %0, 1, %0
yann@1
   715
-  	    1:"								\
yann@1
   716
+  __asm__ ("addcc %r4,%5,%1\n"            \
yann@1
   717
+  	    "add %r2,%3,%0\n"                 \
yann@1
   718
+  	    "bcs,a,pn %%xcc, 1f\n"            \
yann@1
   719
+  	    "add %0, 1, %0\n"                 \
yann@1
   720
+  	    "1:"								\
yann@1
   721
 	   : "=r" ((UDItype)(sh)),				      	\
yann@1
   722
 	     "=&r" ((UDItype)(sl))				      	\
yann@1
   723
 	   : "%rJ" ((UDItype)(ah)),				     	\
yann@1
   724
@@ -1199,11 +1199,11 @@
yann@1
   725
 	   __CLOBBER_CC)
yann@1
   726
 
yann@1
   727
 #define sub_ddmmss(sh, sl, ah, al, bh, bl) 				\
yann@1
   728
-  __asm__ ("subcc %r4,%5,%1
yann@1
   729
-  	    sub %r2,%3,%0
yann@1
   730
-  	    bcs,a,pn %%xcc, 1f
yann@1
   731
-  	    sub %0, 1, %0
yann@1
   732
-  	    1:"								\
yann@1
   733
+  __asm__ ("subcc %r4,%5,%1\n"            \
yann@1
   734
+  	    "sub %r2,%3,%0\n"                 \
yann@1
   735
+  	    "bcs,a,pn %%xcc, 1f\n"            \
yann@1
   736
+  	    "sub %0, 1, %0\n"                 \
yann@1
   737
+  	    "1:"								\
yann@1
   738
 	   : "=r" ((UDItype)(sh)),				      	\
yann@1
   739
 	     "=&r" ((UDItype)(sl))				      	\
yann@1
   740
 	   : "rJ" ((UDItype)(ah)),				     	\
yann@1
   741
@@ -1216,27 +1216,27 @@
yann@1
   742
   do {									\
yann@1
   743
 	  UDItype tmp1, tmp2, tmp3, tmp4;				\
yann@1
   744
 	  __asm__ __volatile__ (					\
yann@1
   745
-		   "srl %7,0,%3
yann@1
   746
-		    mulx %3,%6,%1
yann@1
   747
-		    srlx %6,32,%2
yann@1
   748
-		    mulx %2,%3,%4
yann@1
   749
-		    sllx %4,32,%5
yann@1
   750
-		    srl %6,0,%3
yann@1
   751
-		    sub %1,%5,%5
yann@1
   752
-		    srlx %5,32,%5
yann@1
   753
-		    addcc %4,%5,%4
yann@1
   754
-		    srlx %7,32,%5
yann@1
   755
-		    mulx %3,%5,%3
yann@1
   756
-		    mulx %2,%5,%5
yann@1
   757
-		    sethi %%hi(0x80000000),%2
yann@1
   758
-		    addcc %4,%3,%4
yann@1
   759
-		    srlx %4,32,%4
yann@1
   760
-		    add %2,%2,%2
yann@1
   761
-		    movcc %%xcc,%%g0,%2
yann@1
   762
-		    addcc %5,%4,%5
yann@1
   763
-		    sllx %3,32,%3
yann@1
   764
-		    add %1,%3,%1
yann@1
   765
-		    add %5,%2,%0"					\
yann@1
   766
+		   "srl %7,0,%3\n"                     \
yann@1
   767
+		    "mulx %3,%6,%1\n"                  \
yann@1
   768
+		    "srlx %6,32,%2\n"                  \
yann@1
   769
+		    "mulx %2,%3,%4\n"                  \
yann@1
   770
+		    "sllx %4,32,%5\n"                  \
yann@1
   771
+		    "srl %6,0,%3\n"                    \
yann@1
   772
+		    "sub %1,%5,%5\n"                   \
yann@1
   773
+		    "srlx %5,32,%5\n"                  \
yann@1
   774
+		    "addcc %4,%5,%4\n"                 \
yann@1
   775
+		    "srlx %7,32,%5\n"                  \
yann@1
   776
+		    "mulx %3,%5,%3\n"                  \
yann@1
   777
+		    "mulx %2,%5,%5\n"                  \
yann@1
   778
+		    "sethi %%hi(0x80000000),%2\n"      \
yann@1
   779
+		    "addcc %4,%3,%4\n"                 \
yann@1
   780
+		    "srlx %4,32,%4\n"                  \
yann@1
   781
+		    "add %2,%2,%2\n"                   \
yann@1
   782
+		    "movcc %%xcc,%%g0,%2\n"            \
yann@1
   783
+		    "addcc %5,%4,%5\n"                 \
yann@1
   784
+		    "sllx %3,32,%3\n"                  \
yann@1
   785
+		    "add %1,%3,%1\n"                   \
yann@1
   786
+		    "add %5,%2,%0"					\
yann@1
   787
 	   : "=r" ((UDItype)(wh)),					\
yann@1
   788
 	     "=&r" ((UDItype)(wl)),					\
yann@1
   789
 	     "=&r" (tmp1), "=&r" (tmp2), "=&r" (tmp3), "=&r" (tmp4)	\
yann@1
   790
@@ -1250,8 +1250,8 @@
yann@1
   791
 
yann@1
   792
 #if defined (__vax__) && W_TYPE_SIZE == 32
yann@1
   793
 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
yann@1
   794
-  __asm__ ("addl2 %5,%1
yann@1
   795
-	adwc %3,%0"							\
yann@1
   796
+  __asm__ ("addl2 %5,%1\n"            \
yann@1
   797
+	"adwc %3,%0"							\
yann@1
   798
 	   : "=g" ((USItype) (sh)),					\
yann@1
   799
 	     "=&g" ((USItype) (sl))					\
yann@1
   800
 	   : "%0" ((USItype) (ah)),					\
yann@1
   801
@@ -1259,8 +1259,8 @@
yann@1
   802
 	     "%1" ((USItype) (al)),					\
yann@1
   803
 	     "g" ((USItype) (bl)))
yann@1
   804
 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
yann@1
   805
-  __asm__ ("subl2 %5,%1
yann@1
   806
-	sbwc %3,%0"							\
yann@1
   807
+  __asm__ ("subl2 %5,%1\n"            \
yann@1
   808
+	"sbwc %3,%0"							\
yann@1
   809
 	   : "=g" ((USItype) (sh)),					\
yann@1
   810
 	     "=&g" ((USItype) (sl))					\
yann@1
   811
 	   : "0" ((USItype) (ah)),					\