patches/gmp/4.3.1/110-unbounded-alloc.patch
author Michael Hope <michael.hope@linaro.org>
Wed Oct 19 15:27:32 2011 +1300 (2011-10-19)
changeset 2739 f320e22f2cba
permissions -rw-r--r--
arch: add softfp support

Some architectures support a mixed hard/soft floating point, where
the compiler emits hardware floating point instructions, but passes
the operands in core (aka integer) registers.

For example, ARM supports this mode (to come in the next changeset).

Add support for softfp cross compilers to the GCC and GLIBC
configuration. Needed for Ubuntu and other distros that are softfp.

Signed-off-by: Michael Hope <michael.hope@linaro.org>
[yann.morin.1998@anciens.enib.fr: split the original patch]
Signed-off-by: "Yann E. MORIN" <yann.morin.1998@anciens.enib.fr>
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diff --git a/mpn/generic/toom44_mul.c b/mpn/generic/toom44_mul.c
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--- a/mpn/generic/toom44_mul.c
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+++ b/mpn/generic/toom44_mul.c
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@@ -116,17 +116,16 @@
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   TMP_MARK;
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-  as1  = TMP_SALLOC_LIMBS (n + 1);
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-  asm1 = TMP_SALLOC_LIMBS (n + 1);
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-  as2  = TMP_SALLOC_LIMBS (n + 1);
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-  ash  = TMP_SALLOC_LIMBS (n + 1);
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-  asmh = TMP_SALLOC_LIMBS (n + 1);
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-
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-  bs1  = TMP_SALLOC_LIMBS (n + 1);
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-  bsm1 = TMP_SALLOC_LIMBS (n + 1);
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-  bs2  = TMP_SALLOC_LIMBS (n + 1);
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-  bsh  = TMP_SALLOC_LIMBS (n + 1);
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-  bsmh = TMP_SALLOC_LIMBS (n + 1);
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+  as1  = TMP_ALLOC_LIMBS (10 * n + 10);
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+  asm1 = as1  + n + 1;
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+  as2  = asm1 + n + 1;
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+  ash  = as2  + n + 1;
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+  asmh = ash  + n + 1;
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+  bs1  = asmh + n + 1;
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+  bsm1 = bs1  + n + 1;
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+  bs2  = bsm1 + n + 1;
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+  bsh  = bs2  + n + 1;
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+  bsmh = bsh  + n + 1;
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   gp = pp;
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   hp = pp + n + 1;