1.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     1.2 +++ b/patches/gcc/4.0.2/120-pr21623-workaround.patch	Sun Sep 23 17:08:09 2007 +0000
     1.3 @@ -0,0 +1,53 @@
     1.4 +Message-ID: <434576E1.6020305@sscd.de>
     1.5 +Date: Thu, 06 Oct 2005 21:11:29 +0200
     1.6 +From: Alexander Sieb <sieb@sscd.de>
     1.7 +To: crossgcc@sourceware.org
     1.8 +Subject: Crosstool sh4-linux-gcc-4.0.2-glibc-2.3.5 patches
     1.9 +
    1.10 +Hi,
    1.11 +
    1.12 +attached you find the files I needed to add to crosstool-0.38
    1.13 +in order to build a sh4-linux gcc-4.0.2-glibc-2.3.5 tool chain.
    1.14 +
    1.15 +Files attached:
    1.16 +
    1.17 +sh4-gcc4.dat:
    1.18 +        * gcc4 needs --with-multilib-list=m4,m4-nofpu otherwise a linux
    1.19 +        kernel won't build as it uses the -m4-nofpu option.
    1.20 +
    1.21 +gcc-pr21623.patch:
    1.22 +        * Kaz Kojima provided a patch [really, a workaround -dank] for http://gcc.gnu.org/PR21623
    1.23 +
    1.24 +glibc-2.3.5-sh-memset.patch:
    1.25 +        * A patch for glibc-2.3.5 which corrects memset. From SUGIOKA Toshinobu.
    1.26 +        See content for rationale.
    1.27 +
    1.28 +-- snip --
    1.29 +
    1.30 +-- Here's patch 1 of 2, plus URLs showing where it is in CVS --
    1.31 +
    1.32 +[http://gcc.gnu.org/ml/gcc-cvs/2005-10/msg00081.html]
    1.33 +
    1.34 +2005-09-30  Kaz Kojima  <kkojima@gcc.gnu.org>
    1.35 +
    1.36 +	* config/sh/sh.c (sh_register_move_cost): Add case for moving
    1.37 +	from T_REGS to FP register class.
    1.38 +
    1.39 +[http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/config/sh/sh.c.diff?cvsroot=gcc&r1=1.347&r2=1.348]
    1.40 +
    1.41 +RCS file: /cvs/gcc/gcc/gcc/config/sh/sh.c,v
    1.42 +retrieving revision 1.347
    1.43 +retrieving revision 1.348
    1.44 +diff -u -r1.347 -r1.348
    1.45 +--- gcc/gcc/config/sh/sh.c	2005/09/05 12:45:22	1.347
    1.46 ++++ gcc/gcc/config/sh/sh.c	2005/10/03 22:07:08	1.348
    1.47 +@@ -9491,6 +9491,9 @@ sh_register_move_cost (enum machine_mode
    1.48 +       && REGCLASS_HAS_FP_REG (dstclass))
    1.49 +     return 4;
    1.50 + 
    1.51 ++  if (REGCLASS_HAS_FP_REG (dstclass) && srcclass == T_REGS)
    1.52 ++    return ((TARGET_HARD_SH4 && !optimize_size) ? 10 : 7);
    1.53 ++
    1.54 +   if ((REGCLASS_HAS_FP_REG (dstclass) && srcclass == MAC_REGS)
    1.55 +       || (dstclass == MAC_REGS && REGCLASS_HAS_FP_REG (srcclass)))
    1.56 +     return 9;