1.1 --- a/patches/gcc/3.3.4/gcc-3.3.4-ppc-asm-spec.patch Tue Aug 14 19:32:22 2007 +0000
1.2 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000
1.3 @@ -1,86 +0,0 @@
1.4 -Based on gcc-3.4.0/gcc-3.3.3h-ppc-asm-spec.patch
1.5 -
1.6 -Fixes the following errors when building gcc for ppc7450:
1.7 -
1.8 -/tmp/ccj38uQs.s: Assembler messages:
1.9 -/tmp/ccj38uQs.s:4370: Error: Unrecognized opcode: `mfvrsave'
1.10 -/tmp/ccj38uQs.s:4404: Error: Unrecognized opcode: `stvx'
1.11 -/tmp/ccj38uQs.s:4571: Error: Unrecognized opcode: `lvx'
1.12 -/tmp/ccj38uQs.s:4572: Error: Unrecognized opcode: `mtvrsave'
1.13 -make[2]: *** [libgcc/./unwind-dw2.o] Error 1
1.14 -make[2]: Leaving directory `/opt/crosstool-0.28-rc35/build/powerpc-7450-linux-gnu/gcc-3.3.4-glibc-2.3.2/build-gcc-core/gcc'
1.15 -make[1]: *** [stmp-multilib] Error 2
1.16 -make[1]: Leaving directory `/opt/crosstool-0.28-rc35/build/powerpc-7450-linux-gnu/gcc-3.3.4-glibc-2.3.2/build-gcc-core/gcc'
1.17 -make: *** [all-gcc] Error 2
1.18 -
1.19 -Note that the "-mcpu=7450" option must appear on the "gcc" command line in
1.20 -order for "-maltivec" to be passed to the assembler. Or, "-maltivec" itself
1.21 -may be passed to the "gcc" command.
1.22 -
1.23 -Contributed by Tom Warzeka <waz@quahog.npt.nuwc.navy.mil>
1.24 -
1.25 -===================================================================
1.26 ---- gcc-3.3.4/gcc/config/rs6000/rs6000.h~ 2004-02-01 23:40:49.000000000 -0500
1.27 -+++ gcc-3.3.4/gcc/config/rs6000/rs6000.h 2004-08-18 14:15:57.000000000 -0400
1.28 -@@ -52,23 +52,29 @@
1.29 - "%{!mcpu*: \
1.30 - %{mpower: %{!mpower2: -mpwr}} \
1.31 - %{mpower2: -mpwrx} \
1.32 -- %{mpowerpc*: -mppc} \
1.33 -+ %{mpowerpc64*: -mppc64} \
1.34 -+ %{!mpowerpc64*: %{mpowerpc*: -mppc}} \
1.35 - %{mno-power: %{!mpowerpc*: -mcom}} \
1.36 -- %{!mno-power: %{!mpower2: %(asm_default)}}} \
1.37 -+ %{!mno-power: %{!mpower*: %(asm_default)}}} \
1.38 - %{mcpu=common: -mcom} \
1.39 - %{mcpu=power: -mpwr} \
1.40 - %{mcpu=power2: -mpwrx} \
1.41 --%{mcpu=power3: -m604} \
1.42 -+%{mcpu=power3: -mppc64} \
1.43 - %{mcpu=power4: -mpower4} \
1.44 -+%{mcpu=power5: -mpower4} \
1.45 - %{mcpu=powerpc: -mppc} \
1.46 - %{mcpu=rios: -mpwr} \
1.47 - %{mcpu=rios1: -mpwr} \
1.48 - %{mcpu=rios2: -mpwrx} \
1.49 - %{mcpu=rsc: -mpwr} \
1.50 - %{mcpu=rsc1: -mpwr} \
1.51 -+%{mcpu=rs64a: -mppc64} \
1.52 - %{mcpu=401: -mppc} \
1.53 - %{mcpu=403: -m403} \
1.54 - %{mcpu=405: -m405} \
1.55 -+%{mcpu=405fp: -m405} \
1.56 -+%{mcpu=440: -m440} \
1.57 -+%{mcpu=440fp: -m440} \
1.58 - %{mcpu=505: -mppc} \
1.59 - %{mcpu=601: -m601} \
1.60 - %{mcpu=602: -mppc} \
1.61 -@@ -77,18 +83,23 @@
1.62 - %{mcpu=ec603e: -mppc} \
1.63 - %{mcpu=604: -mppc} \
1.64 - %{mcpu=604e: -mppc} \
1.65 --%{mcpu=620: -mppc} \
1.66 --%{mcpu=630: -m604} \
1.67 -+%{mcpu=620: -mppc64} \
1.68 -+%{mcpu=630: -mppc64} \
1.69 - %{mcpu=740: -mppc} \
1.70 --%{mcpu=7400: -mppc} \
1.71 --%{mcpu=7450: -mppc} \
1.72 - %{mcpu=750: -mppc} \
1.73 -+%{mcpu=G3: -mppc} \
1.74 -+%{mcpu=7400: -mppc -maltivec} \
1.75 -+%{mcpu=7450: -mppc -maltivec} \
1.76 -+%{mcpu=G4: -mppc -maltivec} \
1.77 - %{mcpu=801: -mppc} \
1.78 - %{mcpu=821: -mppc} \
1.79 - %{mcpu=823: -mppc} \
1.80 - %{mcpu=860: -mppc} \
1.81 -+%{mcpu=970: -mpower4 -maltivec} \
1.82 -+%{mcpu=G5: -mpower4 -maltivec} \
1.83 - %{mcpu=8540: -me500} \
1.84 --%{maltivec: -maltivec}"
1.85 -+%{maltivec: -maltivec} \
1.86 -+-many"
1.87 -
1.88 - #define CPP_DEFAULT_SPEC ""
1.89 -