patches/gcc/3.4.4/601-gcc34-arm-ldm-peephole2.patch
changeset 330 447b203edc2e
parent 329 419d959441ed
child 331 0c05f9ea3254
     1.1 --- a/patches/gcc/3.4.4/601-gcc34-arm-ldm-peephole2.patch	Tue Aug 14 19:32:22 2007 +0000
     1.2 +++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
     1.3 @@ -1,42 +0,0 @@
     1.4 -The 30_all_gcc34-arm-ldm-peephole.patch from Debian was conflicting 
     1.5 -with the newer 36_all_pr16201-fix.patch, so i cut out the hunk from 
     1.6 -it that was causing problems and grabbed an updated version from 
     1.7 -upstream cvs.
     1.8 -
     1.9 -Index: gcc/config/arm/arm.c
    1.10 -===================================================================
    1.11 -RCS file: /cvsroot/gcc/gcc/gcc/config/arm/arm.c,v
    1.12 -retrieving revision 1.432
    1.13 -retrieving revision 1.433
    1.14 -diff -u -r1.432 -r1.433
    1.15 ---- gcc-3.4.4/gcc/config/arm/arm.c	29 Mar 2005 03:00:23 -0000	1.432
    1.16 -+++ gcc-3.4.4/gcc/config/arm/arm.c	1 Apr 2005 11:02:22 -0000	1.433
    1.17 -@@ -5139,6 +5139,10 @@
    1.18 - int
    1.19 - adjacent_mem_locations (rtx a, rtx b)
    1.20 - {
    1.21 -+  /* We don't guarantee to preserve the order of these memory refs.  */
    1.22 -+  if (volatile_refs_p (a) || volatile_refs_p (b))
    1.23 -+    return 0;
    1.24 -+
    1.25 -   if ((GET_CODE (XEXP (a, 0)) == REG
    1.26 -        || (GET_CODE (XEXP (a, 0)) == PLUS
    1.27 - 	   && GET_CODE (XEXP (XEXP (a, 0), 1)) == CONST_INT))
    1.28 -@@ -5178,6 +5182,17 @@
    1.29 - 	return 0;
    1.30 - 
    1.31 -       val_diff = val1 - val0;
    1.32 -+
    1.33 -+      if (arm_ld_sched)
    1.34 -+	{
    1.35 -+	  /* If the target has load delay slots, then there's no benefit
    1.36 -+	     to using an ldm instruction unless the offset is zero and
    1.37 -+	     we are optimizing for size.  */
    1.38 -+	  return (optimize_size && (REGNO (reg0) == REGNO (reg1))
    1.39 -+		  && (val0 == 0 || val1 == 0 || val0 == 4 || val1 == 4)
    1.40 -+		  && (val_diff == 4 || val_diff == -4));
    1.41 -+	}
    1.42 -+
    1.43 -       return ((REGNO (reg0) == REGNO (reg1))
    1.44 - 	      && (val_diff == 4 || val_diff == -4));
    1.45 -     }