1.1 --- a/patches/linux/2.6.8/110-linux-2.6.8-allow-gcc-4.0-asm-i386.patch Fri Sep 05 16:15:34 2008 +0000
1.2 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000
1.3 @@ -1,138 +0,0 @@
1.4 -Fixes
1.5 -
1.6 -In file included from include/asm/thread_info.h:16,
1.7 - from include/linux/thread_info.h:21,
1.8 - from include/linux/spinlock.h:12,
1.9 - from include/linux/capability.h:45,
1.10 - from include/linux/sched.h:7,
1.11 - from arch/i386/kernel/asm-offsets.c:7:
1.12 -include/asm/processor.h:87: error: array type has incomplete element type
1.13 -make[1]: *** [arch/i386/kernel/asm-offsets.asm] Error 1
1.14 -
1.15 ---- linux-2.6.8/include/asm-i386/processor.h.old Tue Mar 15 00:14:42 2005
1.16 -+++ linux-2.6.8/include/asm-i386/processor.h Tue Mar 15 00:18:45 2005
1.17 -@@ -79,6 +79,58 @@
1.18 - #define X86_VENDOR_UNKNOWN 0xff
1.19 -
1.20 - /*
1.21 -+ * Size of io_bitmap.
1.22 -+ */
1.23 -+#define IO_BITMAP_BITS 65536
1.24 -+#define IO_BITMAP_BYTES (IO_BITMAP_BITS/8)
1.25 -+#define IO_BITMAP_LONGS (IO_BITMAP_BYTES/sizeof(long))
1.26 -+#define IO_BITMAP_OFFSET offsetof(struct tss_struct,io_bitmap)
1.27 -+#define INVALID_IO_BITMAP_OFFSET 0x8000
1.28 -+
1.29 -+struct tss_struct {
1.30 -+ unsigned short back_link,__blh;
1.31 -+ unsigned long esp0;
1.32 -+ unsigned short ss0,__ss0h;
1.33 -+ unsigned long esp1;
1.34 -+ unsigned short ss1,__ss1h; /* ss1 is used to cache MSR_IA32_SYSENTER_CS */
1.35 -+ unsigned long esp2;
1.36 -+ unsigned short ss2,__ss2h;
1.37 -+ unsigned long __cr3;
1.38 -+ unsigned long eip;
1.39 -+ unsigned long eflags;
1.40 -+ unsigned long eax,ecx,edx,ebx;
1.41 -+ unsigned long esp;
1.42 -+ unsigned long ebp;
1.43 -+ unsigned long esi;
1.44 -+ unsigned long edi;
1.45 -+ unsigned short es, __esh;
1.46 -+ unsigned short cs, __csh;
1.47 -+ unsigned short ss, __ssh;
1.48 -+ unsigned short ds, __dsh;
1.49 -+ unsigned short fs, __fsh;
1.50 -+ unsigned short gs, __gsh;
1.51 -+ unsigned short ldt, __ldth;
1.52 -+ unsigned short trace, io_bitmap_base;
1.53 -+ /*
1.54 -+ * The extra 1 is there because the CPU will access an
1.55 -+ * additional byte beyond the end of the IO permission
1.56 -+ * bitmap. The extra byte must be all 1 bits, and must
1.57 -+ * be within the limit.
1.58 -+ */
1.59 -+ unsigned long io_bitmap[IO_BITMAP_LONGS + 1];
1.60 -+ /*
1.61 -+ * pads the TSS to be cacheline-aligned (size is 0x100)
1.62 -+ */
1.63 -+ unsigned long __cacheline_filler[37];
1.64 -+ /*
1.65 -+ * .. and then another 0x100 bytes for emergency kernel stack
1.66 -+ */
1.67 -+ unsigned long stack[64];
1.68 -+} __attribute__((packed));
1.69 -+
1.70 -+#define ARCH_MIN_TASKALIGN 16
1.71 -+
1.72 -+/*
1.73 - * capabilities of CPUs
1.74 - */
1.75 -
1.76 -@@ -296,15 +348,6 @@
1.77 - */
1.78 - #define TASK_UNMAPPED_BASE (PAGE_ALIGN(TASK_SIZE / 3))
1.79 -
1.80 --/*
1.81 -- * Size of io_bitmap.
1.82 -- */
1.83 --#define IO_BITMAP_BITS 65536
1.84 --#define IO_BITMAP_BYTES (IO_BITMAP_BITS/8)
1.85 --#define IO_BITMAP_LONGS (IO_BITMAP_BYTES/sizeof(long))
1.86 --#define IO_BITMAP_OFFSET offsetof(struct tss_struct,io_bitmap)
1.87 --#define INVALID_IO_BITMAP_OFFSET 0x8000
1.88 --
1.89 - struct i387_fsave_struct {
1.90 - long cwd;
1.91 - long swd;
1.92 -@@ -356,49 +399,6 @@
1.93 - typedef struct {
1.94 - unsigned long seg;
1.95 - } mm_segment_t;
1.96 --
1.97 --struct tss_struct {
1.98 -- unsigned short back_link,__blh;
1.99 -- unsigned long esp0;
1.100 -- unsigned short ss0,__ss0h;
1.101 -- unsigned long esp1;
1.102 -- unsigned short ss1,__ss1h; /* ss1 is used to cache MSR_IA32_SYSENTER_CS */
1.103 -- unsigned long esp2;
1.104 -- unsigned short ss2,__ss2h;
1.105 -- unsigned long __cr3;
1.106 -- unsigned long eip;
1.107 -- unsigned long eflags;
1.108 -- unsigned long eax,ecx,edx,ebx;
1.109 -- unsigned long esp;
1.110 -- unsigned long ebp;
1.111 -- unsigned long esi;
1.112 -- unsigned long edi;
1.113 -- unsigned short es, __esh;
1.114 -- unsigned short cs, __csh;
1.115 -- unsigned short ss, __ssh;
1.116 -- unsigned short ds, __dsh;
1.117 -- unsigned short fs, __fsh;
1.118 -- unsigned short gs, __gsh;
1.119 -- unsigned short ldt, __ldth;
1.120 -- unsigned short trace, io_bitmap_base;
1.121 -- /*
1.122 -- * The extra 1 is there because the CPU will access an
1.123 -- * additional byte beyond the end of the IO permission
1.124 -- * bitmap. The extra byte must be all 1 bits, and must
1.125 -- * be within the limit.
1.126 -- */
1.127 -- unsigned long io_bitmap[IO_BITMAP_LONGS + 1];
1.128 -- /*
1.129 -- * pads the TSS to be cacheline-aligned (size is 0x100)
1.130 -- */
1.131 -- unsigned long __cacheline_filler[37];
1.132 -- /*
1.133 -- * .. and then another 0x100 bytes for emergency kernel stack
1.134 -- */
1.135 -- unsigned long stack[64];
1.136 --} __attribute__((packed));
1.137 --
1.138 --#define ARCH_MIN_TASKALIGN 16
1.139 -
1.140 - struct thread_struct {
1.141 - /* cached TLS descriptors. */