patches/gcc/3.2.3/110-ppc405erratum77.patch
changeset 746 b150d6f590fc
parent 402 197e1b49586e
     1.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     1.2 +++ b/patches/gcc/3.2.3/110-ppc405erratum77.patch	Mon Jul 28 21:08:01 2008 +0000
     1.3 @@ -0,0 +1,105 @@
     1.4 +# See http://gcc.gnu.org/PR7383, http://www.kegel.com/xgcc3/ppc405erratum77.html
     1.5 +# Fixed in gcc-3.3
     1.6 +
     1.7 +diff -aur gcc-20020722.orig/gcc/config/rs6000/rs6000.h gcc-20020722/gcc/config/rs6000/rs6000.h
     1.8 +--- gcc-20020722.orig/gcc/config/rs6000/rs6000.h	Thu Jul 25 09:32:21 2002
     1.9 ++++ gcc-20020722/gcc/config/rs6000/rs6000.h	Thu Jul 25 09:34:45 2002
    1.10 +@@ -66,7 +66,7 @@
    1.11 + %{mcpu=rsc1: -D_ARCH_PWR} \
    1.12 + %{mcpu=401: -D_ARCH_PPC} \
    1.13 + %{mcpu=403: -D_ARCH_PPC} \
    1.14 +-%{mcpu=405: -D_ARCH_PPC} \
    1.15 ++%{mcpu=405: -D_ARCH_PPC -D__PPC405__} \
    1.16 + %{mcpu=505: -D_ARCH_PPC} \
    1.17 + %{mcpu=601: -D_ARCH_PPC -D_ARCH_PWR} \
    1.18 + %{mcpu=602: -D_ARCH_PPC} \
    1.19 +diff -aur gcc-20020722.orig/libjava/sysdep/powerpc/locks.h gcc-20020722/libjava/sysdep/powerpc/locks.h
    1.20 +--- gcc-20020722.orig/libjava/sysdep/powerpc/locks.h	Thu Jul 25 09:32:30 2002
    1.21 ++++ gcc-20020722/libjava/sysdep/powerpc/locks.h	Thu Jul 25 11:39:13 2002
    1.22 +@@ -11,6 +11,17 @@
    1.23 + #ifndef __SYSDEP_LOCKS_H__
    1.24 + #define __SYSDEP_LOCKS_H__
    1.25 + 
    1.26 ++#ifdef __PPC405__
    1.27 ++// workaround for PPC405 erratum #77 - 07/18/02 JRO, dank, NN.  References:
    1.28 ++// http://www-3.ibm.com/chips/techlib/techlib.nsf/techdocs/89DED00DEBFF54BF87256A8000491BA2/$file/405CR_C_errata_1_2.pdf
    1.29 ++// http://ppc.bkbits.net:8080/linuxppc_2_4_devel/cset@1.489
    1.30 ++// http://www.kegel.com/xgcc3/ppc405erratum77.html
    1.31 ++// FIXME: using dbct instead of sync would be faster
    1.32 ++#define __LIBGCJ_PPC405_ERR77_SYNC   "sync \n\t"
    1.33 ++#else
    1.34 ++#define __LIBGCJ_PPC405_ERR77_SYNC
    1.35 ++#endif
    1.36 ++
    1.37 + typedef size_t obj_addr_t;	/* Integer type big enough for object	*/
    1.38 + 				/* address.				*/
    1.39 + 
    1.40 +@@ -25,6 +36,7 @@
    1.41 + 	   "0:    lwarx %0,0,%1 ;"
    1.42 + 	   "      xor. %0,%3,%0;"
    1.43 + 	   "      bne 1f;"
    1.44 ++  	  __LIBGCJ_PPC405_ERR77_SYNC
    1.45 + 	   "      stwcx. %2,0,%1;"
    1.46 + 	   "      bne- 0b;"
    1.47 + 	   "1:    "
    1.48 +@@ -58,6 +70,7 @@
    1.49 + 	   "0:    lwarx %0,0,%1 ;"
    1.50 + 	   "      xor. %0,%3,%0;"
    1.51 + 	   "      bne 1f;"
    1.52 ++	   __LIBGCJ_PPC405_ERR77_SYNC	 
    1.53 + 	   "      stwcx. %2,0,%1;"
    1.54 + 	   "      bne- 0b;"
    1.55 + 	   "1:    "
    1.56 +diff -aur gcc-20020722.orig/libstdc++-v3/config/cpu/powerpc/bits/atomicity.h gcc-20020722/libstdc++-v3/config/cpu/powerpc/bits/atomicity.h
    1.57 +--- gcc-20020722.orig/libstdc++-v3/config/cpu/powerpc/bits/atomicity.h	Thu Jul 25 09:32:31 2002
    1.58 ++++ gcc-20020722/libstdc++-v3/config/cpu/powerpc/bits/atomicity.h	Thu Jul 25 09:34:45 2002
    1.59 +@@ -32,6 +32,17 @@
    1.60 + 
    1.61 + typedef int _Atomic_word;
    1.62 + 
    1.63 ++#ifdef __PPC405__
    1.64 ++// workaround for PPC405 erratum #77 - 07/18/02 JRO & dank.  References:
    1.65 ++// http://www-3.ibm.com/chips/techlib/techlib.nsf/techdocs/89DED00DEBFF54BF87256A8000491BA2/$file/405CR_C_errata_1_2.pdf
    1.66 ++// http://ppc.bkbits.net:8080/linuxppc_2_4_devel/cset@1.489
    1.67 ++// http://www.kegel.com/xgcc3/ppc405erratum77.html
    1.68 ++// FIXME: using dbct instead of sync would be faster
    1.69 ++#define	__LIBSTDCPP_PPC405_ERR77_SYNC	"sync \n\t"
    1.70 ++#else
    1.71 ++#define __LIBSTDCPP_PPC405_ERR77_SYNC
    1.72 ++#endif
    1.73 ++
    1.74 + static inline _Atomic_word
    1.75 + __attribute__ ((__unused__))
    1.76 + __exchange_and_add (volatile _Atomic_word* __mem, int __val)
    1.77 +@@ -42,6 +53,7 @@
    1.78 + 	"0:\t"
    1.79 + 	"lwarx    %0,0,%2 \n\t"
    1.80 + 	"add%I3   %1,%0,%3 \n\t"
    1.81 ++	__LIBSTDCPP_PPC405_ERR77_SYNC
    1.82 + 	"stwcx.   %1,0,%2 \n\t"
    1.83 + 	"bne-     0b \n\t"
    1.84 + 	"/* End exchange & add */"
    1.85 +@@ -61,6 +73,7 @@
    1.86 + 	"0:\t"
    1.87 + 	"lwarx    %0,0,%1 \n\t"
    1.88 + 	"add%I2   %0,%0,%2 \n\t"
    1.89 ++	__LIBSTDCPP_PPC405_ERR77_SYNC
    1.90 + 	"stwcx.   %0,0,%1 \n\t"
    1.91 + 	"bne-     0b \n\t"
    1.92 + 	"/* End atomic add */"
    1.93 +@@ -78,6 +91,7 @@
    1.94 + 	"/* Inline always swap */\n"
    1.95 + 	"0:\t"
    1.96 + 	"lwarx    %0,0,%1 \n\t"
    1.97 ++	__LIBSTDCPP_PPC405_ERR77_SYNC
    1.98 + 	"stwcx.   %2,0,%1 \n\t"
    1.99 + 	"bne-     0b \n\t"
   1.100 + 	"/* End always swap */"
   1.101 +@@ -98,6 +112,7 @@
   1.102 + 	"lwarx    %0,0,%1 \n\t"
   1.103 + 	"cmpwi    %0,0 \n\t"
   1.104 + 	"bne-     1f \n\t"
   1.105 ++	__LIBSTDCPP_PPC405_ERR77_SYNC
   1.106 + 	"stwcx.   %2,0,%1 \n\t"
   1.107 + 	"bne-     0b \n"
   1.108 + 	"1:\n\t"