1.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
1.2 +++ b/patches/glibc/2.9/500-ppc-glibc-2.9-atomic.patch Sun Apr 19 16:17:11 2009 +0000
1.3 @@ -0,0 +1,414 @@
1.4 +Original patch from: gentoo/src/patchsets/glibc/2.9/6120_all_ppc-glibc-2.9-atomic.patch
1.5 +
1.6 +-= BEGIN original header =-
1.7 +sniped from suse
1.8 +
1.9 +-= END original header =-
1.10 +
1.11 +diff -durN glibc-2_9.orig/sysdeps/powerpc/bits/atomic.h glibc-2_9/sysdeps/powerpc/bits/atomic.h
1.12 +--- glibc-2_9.orig/sysdeps/powerpc/bits/atomic.h 2007-03-26 22:15:28.000000000 +0200
1.13 ++++ glibc-2_9/sysdeps/powerpc/bits/atomic.h 2009-02-02 22:01:40.000000000 +0100
1.14 +@@ -85,14 +85,14 @@
1.15 + __typeof (*(mem)) __tmp; \
1.16 + __typeof (mem) __memp = (mem); \
1.17 + __asm __volatile ( \
1.18 +- "1: lwarx %0,0,%1" MUTEX_HINT_ACQ "\n" \
1.19 ++ "1: lwarx %0,%y1" MUTEX_HINT_ACQ "\n" \
1.20 + " cmpw %0,%2\n" \
1.21 + " bne 2f\n" \
1.22 +- " stwcx. %3,0,%1\n" \
1.23 ++ " stwcx. %3,%y1\n" \
1.24 + " bne- 1b\n" \
1.25 + "2: " __ARCH_ACQ_INSTR \
1.26 +- : "=&r" (__tmp) \
1.27 +- : "b" (__memp), "r" (oldval), "r" (newval) \
1.28 ++ : "=&r" (__tmp), "+Z" (*__memp) \
1.29 ++ : "r" (oldval), "r" (newval) \
1.30 + : "cr0", "memory"); \
1.31 + __tmp; \
1.32 + })
1.33 +@@ -102,14 +102,14 @@
1.34 + __typeof (*(mem)) __tmp; \
1.35 + __typeof (mem) __memp = (mem); \
1.36 + __asm __volatile (__ARCH_REL_INSTR "\n" \
1.37 +- "1: lwarx %0,0,%1" MUTEX_HINT_REL "\n" \
1.38 ++ "1: lwarx %0,%y1" MUTEX_HINT_REL "\n" \
1.39 + " cmpw %0,%2\n" \
1.40 + " bne 2f\n" \
1.41 +- " stwcx. %3,0,%1\n" \
1.42 ++ " stwcx. %3,%y1\n" \
1.43 + " bne- 1b\n" \
1.44 + "2: " \
1.45 +- : "=&r" (__tmp) \
1.46 +- : "b" (__memp), "r" (oldval), "r" (newval) \
1.47 ++ : "=&r" (__tmp), "+Z" (__memp) \
1.48 ++ : "r" (oldval), "r" (newval) \
1.49 + : "cr0", "memory"); \
1.50 + __tmp; \
1.51 + })
1.52 +@@ -118,12 +118,12 @@
1.53 + ({ \
1.54 + __typeof (*mem) __val; \
1.55 + __asm __volatile ( \
1.56 +- "1: lwarx %0,0,%2" MUTEX_HINT_ACQ "\n" \
1.57 +- " stwcx. %3,0,%2\n" \
1.58 ++ "1: lwarx %0,%y1" MUTEX_HINT_ACQ "\n" \
1.59 ++ " stwcx. %2,%y1\n" \
1.60 + " bne- 1b\n" \
1.61 + " " __ARCH_ACQ_INSTR \
1.62 +- : "=&r" (__val), "=m" (*mem) \
1.63 +- : "b" (mem), "r" (value), "m" (*mem) \
1.64 ++ : "=&r" (__val), "+Z" (*mem) \
1.65 ++ : "r" (value) \
1.66 + : "cr0", "memory"); \
1.67 + __val; \
1.68 + })
1.69 +@@ -132,11 +132,11 @@
1.70 + ({ \
1.71 + __typeof (*mem) __val; \
1.72 + __asm __volatile (__ARCH_REL_INSTR "\n" \
1.73 +- "1: lwarx %0,0,%2" MUTEX_HINT_REL "\n" \
1.74 +- " stwcx. %3,0,%2\n" \
1.75 ++ "1: lwarx %0,%y1" MUTEX_HINT_REL "\n" \
1.76 ++ " stwcx. %2,%y1\n" \
1.77 + " bne- 1b" \
1.78 +- : "=&r" (__val), "=m" (*mem) \
1.79 +- : "b" (mem), "r" (value), "m" (*mem) \
1.80 ++ : "=&r" (__val), "+Z" (*mem) \
1.81 ++ : "r" (value) \
1.82 + : "cr0", "memory"); \
1.83 + __val; \
1.84 + })
1.85 +@@ -144,12 +144,12 @@
1.86 + #define __arch_atomic_exchange_and_add_32(mem, value) \
1.87 + ({ \
1.88 + __typeof (*mem) __val, __tmp; \
1.89 +- __asm __volatile ("1: lwarx %0,0,%3\n" \
1.90 +- " add %1,%0,%4\n" \
1.91 +- " stwcx. %1,0,%3\n" \
1.92 ++ __asm __volatile ("1: lwarx %0,%y2\n" \
1.93 ++ " add %1,%0,%3\n" \
1.94 ++ " stwcx. %1,%y2\n" \
1.95 + " bne- 1b" \
1.96 +- : "=&b" (__val), "=&r" (__tmp), "=m" (*mem) \
1.97 +- : "b" (mem), "r" (value), "m" (*mem) \
1.98 ++ : "=&b" (__val), "=&r" (__tmp), "+Z" (*mem) \
1.99 ++ : "r" (value) \
1.100 + : "cr0", "memory"); \
1.101 + __val; \
1.102 + })
1.103 +@@ -157,12 +157,12 @@
1.104 + #define __arch_atomic_increment_val_32(mem) \
1.105 + ({ \
1.106 + __typeof (*(mem)) __val; \
1.107 +- __asm __volatile ("1: lwarx %0,0,%2\n" \
1.108 ++ __asm __volatile ("1: lwarx %0,%y1\n" \
1.109 + " addi %0,%0,1\n" \
1.110 +- " stwcx. %0,0,%2\n" \
1.111 ++ " stwcx. %0,%y1\n" \
1.112 + " bne- 1b" \
1.113 +- : "=&b" (__val), "=m" (*mem) \
1.114 +- : "b" (mem), "m" (*mem) \
1.115 ++ : "=&b" (__val), "+Z" (*mem) \
1.116 ++ : \
1.117 + : "cr0", "memory"); \
1.118 + __val; \
1.119 + })
1.120 +@@ -170,27 +170,27 @@
1.121 + #define __arch_atomic_decrement_val_32(mem) \
1.122 + ({ \
1.123 + __typeof (*(mem)) __val; \
1.124 +- __asm __volatile ("1: lwarx %0,0,%2\n" \
1.125 ++ __asm __volatile ("1: lwarx %0,%y1\n" \
1.126 + " subi %0,%0,1\n" \
1.127 +- " stwcx. %0,0,%2\n" \
1.128 ++ " stwcx. %0,%y1\n" \
1.129 + " bne- 1b" \
1.130 +- : "=&b" (__val), "=m" (*mem) \
1.131 +- : "b" (mem), "m" (*mem) \
1.132 ++ : "=&b" (__val), "+Z" (*mem) \
1.133 ++ : \
1.134 + : "cr0", "memory"); \
1.135 + __val; \
1.136 + })
1.137 +
1.138 + #define __arch_atomic_decrement_if_positive_32(mem) \
1.139 + ({ int __val, __tmp; \
1.140 +- __asm __volatile ("1: lwarx %0,0,%3\n" \
1.141 ++ __asm __volatile ("1: lwarx %0,%y2\n" \
1.142 + " cmpwi 0,%0,0\n" \
1.143 + " addi %1,%0,-1\n" \
1.144 + " ble 2f\n" \
1.145 +- " stwcx. %1,0,%3\n" \
1.146 ++ " stwcx. %1,%y2\n" \
1.147 + " bne- 1b\n" \
1.148 + "2: " __ARCH_ACQ_INSTR \
1.149 +- : "=&b" (__val), "=&r" (__tmp), "=m" (*mem) \
1.150 +- : "b" (mem), "m" (*mem) \
1.151 ++ : "=&b" (__val), "=&r" (__tmp), "+Z" (*mem) \
1.152 ++ : \
1.153 + : "cr0", "memory"); \
1.154 + __val; \
1.155 + })
1.156 +diff -durN glibc-2_9.orig/sysdeps/powerpc/powerpc32/bits/atomic.h glibc-2_9/sysdeps/powerpc/powerpc32/bits/atomic.h
1.157 +--- glibc-2_9.orig/sysdeps/powerpc/powerpc32/bits/atomic.h 2007-03-26 22:15:45.000000000 +0200
1.158 ++++ glibc-2_9/sysdeps/powerpc/powerpc32/bits/atomic.h 2009-02-02 22:01:40.000000000 +0100
1.159 +@@ -44,14 +44,14 @@
1.160 + ({ \
1.161 + unsigned int __tmp; \
1.162 + __asm __volatile ( \
1.163 +- "1: lwarx %0,0,%1" MUTEX_HINT_ACQ "\n" \
1.164 ++ "1: lwarx %0,%y1" MUTEX_HINT_ACQ "\n" \
1.165 + " subf. %0,%2,%0\n" \
1.166 + " bne 2f\n" \
1.167 +- " stwcx. %3,0,%1\n" \
1.168 ++ " stwcx. %3,%y1\n" \
1.169 + " bne- 1b\n" \
1.170 + "2: " __ARCH_ACQ_INSTR \
1.171 +- : "=&r" (__tmp) \
1.172 +- : "b" (mem), "r" (oldval), "r" (newval) \
1.173 ++ : "=&r" (__tmp), "+Z" (*(mem)) \
1.174 ++ : "r" (oldval), "r" (newval) \
1.175 + : "cr0", "memory"); \
1.176 + __tmp != 0; \
1.177 + })
1.178 +@@ -60,14 +60,14 @@
1.179 + ({ \
1.180 + unsigned int __tmp; \
1.181 + __asm __volatile (__ARCH_REL_INSTR "\n" \
1.182 +- "1: lwarx %0,0,%1" MUTEX_HINT_REL "\n" \
1.183 ++ "1: lwarx %0,%y1" MUTEX_HINT_REL "\n" \
1.184 + " subf. %0,%2,%0\n" \
1.185 + " bne 2f\n" \
1.186 +- " stwcx. %3,0,%1\n" \
1.187 ++ " stwcx. %3,%y1\n" \
1.188 + " bne- 1b\n" \
1.189 + "2: " \
1.190 +- : "=&r" (__tmp) \
1.191 +- : "b" (mem), "r" (oldval), "r" (newval) \
1.192 ++ : "=&r" (__tmp), "+Z" (*(mem)) \
1.193 ++ : "r" (oldval), "r" (newval) \
1.194 + : "cr0", "memory"); \
1.195 + __tmp != 0; \
1.196 + })
1.197 +diff -durN glibc-2_9.orig/sysdeps/powerpc/powerpc64/bits/atomic.h glibc-2_9/sysdeps/powerpc/powerpc64/bits/atomic.h
1.198 +--- glibc-2_9.orig/sysdeps/powerpc/powerpc64/bits/atomic.h 2007-03-26 22:16:03.000000000 +0200
1.199 ++++ glibc-2_9/sysdeps/powerpc/powerpc64/bits/atomic.h 2009-02-02 22:01:40.000000000 +0100
1.200 +@@ -44,14 +44,14 @@
1.201 + ({ \
1.202 + unsigned int __tmp, __tmp2; \
1.203 + __asm __volatile (" clrldi %1,%1,32\n" \
1.204 +- "1: lwarx %0,0,%2" MUTEX_HINT_ACQ "\n" \
1.205 ++ "1: lwarx %0,%y2" MUTEX_HINT_ACQ "\n" \
1.206 + " subf. %0,%1,%0\n" \
1.207 + " bne 2f\n" \
1.208 +- " stwcx. %4,0,%2\n" \
1.209 ++ " stwcx. %4,%y2\n" \
1.210 + " bne- 1b\n" \
1.211 + "2: " __ARCH_ACQ_INSTR \
1.212 +- : "=&r" (__tmp), "=r" (__tmp2) \
1.213 +- : "b" (mem), "1" (oldval), "r" (newval) \
1.214 ++ : "=&r" (__tmp), "=r" (__tmp2), "+Z" (*(mem)) \
1.215 ++ : "1" (oldval), "r" (newval) \
1.216 + : "cr0", "memory"); \
1.217 + __tmp != 0; \
1.218 + })
1.219 +@@ -61,14 +61,14 @@
1.220 + unsigned int __tmp, __tmp2; \
1.221 + __asm __volatile (__ARCH_REL_INSTR "\n" \
1.222 + " clrldi %1,%1,32\n" \
1.223 +- "1: lwarx %0,0,%2" MUTEX_HINT_REL "\n" \
1.224 ++ "1: lwarx %0,%y2" MUTEX_HINT_REL "\n" \
1.225 + " subf. %0,%1,%0\n" \
1.226 + " bne 2f\n" \
1.227 +- " stwcx. %4,0,%2\n" \
1.228 ++ " stwcx. %4,%y2\n" \
1.229 + " bne- 1b\n" \
1.230 + "2: " \
1.231 +- : "=&r" (__tmp), "=r" (__tmp2) \
1.232 +- : "b" (mem), "1" (oldval), "r" (newval) \
1.233 ++ : "=&r" (__tmp), "=r" (__tmp2), "+Z" (*(mem)) \
1.234 ++ : "1" (oldval), "r" (newval) \
1.235 + : "cr0", "memory"); \
1.236 + __tmp != 0; \
1.237 + })
1.238 +@@ -82,14 +82,14 @@
1.239 + ({ \
1.240 + unsigned long __tmp; \
1.241 + __asm __volatile ( \
1.242 +- "1: ldarx %0,0,%1" MUTEX_HINT_ACQ "\n" \
1.243 ++ "1: ldarx %0,%y1" MUTEX_HINT_ACQ "\n" \
1.244 + " subf. %0,%2,%0\n" \
1.245 + " bne 2f\n" \
1.246 +- " stdcx. %3,0,%1\n" \
1.247 ++ " stdcx. %3,%y1\n" \
1.248 + " bne- 1b\n" \
1.249 + "2: " __ARCH_ACQ_INSTR \
1.250 +- : "=&r" (__tmp) \
1.251 +- : "b" (mem), "r" (oldval), "r" (newval) \
1.252 ++ : "=&r" (__tmp), "+Z" (*(mem)) \
1.253 ++ : "r" (oldval), "r" (newval) \
1.254 + : "cr0", "memory"); \
1.255 + __tmp != 0; \
1.256 + })
1.257 +@@ -98,14 +98,14 @@
1.258 + ({ \
1.259 + unsigned long __tmp; \
1.260 + __asm __volatile (__ARCH_REL_INSTR "\n" \
1.261 +- "1: ldarx %0,0,%2" MUTEX_HINT_REL "\n" \
1.262 ++ "1: ldarx %0,%y1" MUTEX_HINT_REL "\n" \
1.263 + " subf. %0,%2,%0\n" \
1.264 + " bne 2f\n" \
1.265 +- " stdcx. %3,0,%1\n" \
1.266 ++ " stdcx. %3,%y1\n" \
1.267 + " bne- 1b\n" \
1.268 + "2: " \
1.269 +- : "=&r" (__tmp) \
1.270 +- : "b" (mem), "r" (oldval), "r" (newval) \
1.271 ++ : "=&r" (__tmp), "+Z" (*(mem)) \
1.272 ++ : "r" (oldval), "r" (newval) \
1.273 + : "cr0", "memory"); \
1.274 + __tmp != 0; \
1.275 + })
1.276 +@@ -115,14 +115,14 @@
1.277 + __typeof (*(mem)) __tmp; \
1.278 + __typeof (mem) __memp = (mem); \
1.279 + __asm __volatile ( \
1.280 +- "1: ldarx %0,0,%1" MUTEX_HINT_ACQ "\n" \
1.281 ++ "1: ldarx %0,%y1" MUTEX_HINT_ACQ "\n" \
1.282 + " cmpd %0,%2\n" \
1.283 + " bne 2f\n" \
1.284 +- " stdcx. %3,0,%1\n" \
1.285 ++ " stdcx. %3,%y1\n" \
1.286 + " bne- 1b\n" \
1.287 + "2: " __ARCH_ACQ_INSTR \
1.288 +- : "=&r" (__tmp) \
1.289 +- : "b" (__memp), "r" (oldval), "r" (newval) \
1.290 ++ : "=&r" (__tmp), "+Z" (*__memp) \
1.291 ++ : "r" (oldval), "r" (newval) \
1.292 + : "cr0", "memory"); \
1.293 + __tmp; \
1.294 + })
1.295 +@@ -132,14 +132,14 @@
1.296 + __typeof (*(mem)) __tmp; \
1.297 + __typeof (mem) __memp = (mem); \
1.298 + __asm __volatile (__ARCH_REL_INSTR "\n" \
1.299 +- "1: ldarx %0,0,%1" MUTEX_HINT_REL "\n" \
1.300 ++ "1: ldarx %0,%y1" MUTEX_HINT_REL "\n" \
1.301 + " cmpd %0,%2\n" \
1.302 + " bne 2f\n" \
1.303 +- " stdcx. %3,0,%1\n" \
1.304 ++ " stdcx. %3,%y1\n" \
1.305 + " bne- 1b\n" \
1.306 + "2: " \
1.307 +- : "=&r" (__tmp) \
1.308 +- : "b" (__memp), "r" (oldval), "r" (newval) \
1.309 ++ : "=&r" (__tmp), "+Z" (*__memp) \
1.310 ++ : "r" (oldval), "r" (newval) \
1.311 + : "cr0", "memory"); \
1.312 + __tmp; \
1.313 + })
1.314 +@@ -148,12 +148,12 @@
1.315 + ({ \
1.316 + __typeof (*mem) __val; \
1.317 + __asm __volatile (__ARCH_REL_INSTR "\n" \
1.318 +- "1: ldarx %0,0,%2" MUTEX_HINT_ACQ "\n" \
1.319 +- " stdcx. %3,0,%2\n" \
1.320 ++ "1: ldarx %0,%y1" MUTEX_HINT_ACQ "\n" \
1.321 ++ " stdcx. %2,%y1\n" \
1.322 + " bne- 1b\n" \
1.323 + " " __ARCH_ACQ_INSTR \
1.324 +- : "=&r" (__val), "=m" (*mem) \
1.325 +- : "b" (mem), "r" (value), "m" (*mem) \
1.326 ++ : "=&r" (__val), "+Z" (*(mem)) \
1.327 ++ : "r" (value) \
1.328 + : "cr0", "memory"); \
1.329 + __val; \
1.330 + })
1.331 +@@ -162,11 +162,11 @@
1.332 + ({ \
1.333 + __typeof (*mem) __val; \
1.334 + __asm __volatile (__ARCH_REL_INSTR "\n" \
1.335 +- "1: ldarx %0,0,%2" MUTEX_HINT_REL "\n" \
1.336 +- " stdcx. %3,0,%2\n" \
1.337 ++ "1: ldarx %0,%y1" MUTEX_HINT_REL "\n" \
1.338 ++ " stdcx. %2,%y1\n" \
1.339 + " bne- 1b" \
1.340 +- : "=&r" (__val), "=m" (*mem) \
1.341 +- : "b" (mem), "r" (value), "m" (*mem) \
1.342 ++ : "=&r" (__val), "+Z" (*(mem)) \
1.343 ++ : "r" (value) \
1.344 + : "cr0", "memory"); \
1.345 + __val; \
1.346 + })
1.347 +@@ -174,12 +174,12 @@
1.348 + #define __arch_atomic_exchange_and_add_64(mem, value) \
1.349 + ({ \
1.350 + __typeof (*mem) __val, __tmp; \
1.351 +- __asm __volatile ("1: ldarx %0,0,%3\n" \
1.352 +- " add %1,%0,%4\n" \
1.353 +- " stdcx. %1,0,%3\n" \
1.354 ++ __asm __volatile ("1: ldarx %0,%y2\n" \
1.355 ++ " add %1,%0,%3\n" \
1.356 ++ " stdcx. %1,%y2\n" \
1.357 + " bne- 1b" \
1.358 +- : "=&b" (__val), "=&r" (__tmp), "=m" (*mem) \
1.359 +- : "b" (mem), "r" (value), "m" (*mem) \
1.360 ++ : "=&b" (__val), "=&r" (__tmp), "+Z" (*(mem)) \
1.361 ++ : "r" (value) \
1.362 + : "cr0", "memory"); \
1.363 + __val; \
1.364 + })
1.365 +@@ -187,12 +187,12 @@
1.366 + #define __arch_atomic_increment_val_64(mem) \
1.367 + ({ \
1.368 + __typeof (*(mem)) __val; \
1.369 +- __asm __volatile ("1: ldarx %0,0,%2\n" \
1.370 ++ __asm __volatile ("1: ldarx %0,%y1\n" \
1.371 + " addi %0,%0,1\n" \
1.372 +- " stdcx. %0,0,%2\n" \
1.373 ++ " stdcx. %0,%y1\n" \
1.374 + " bne- 1b" \
1.375 +- : "=&b" (__val), "=m" (*mem) \
1.376 +- : "b" (mem), "m" (*mem) \
1.377 ++ : "=&b" (__val), "+Z" (*(mem)) \
1.378 ++ : \
1.379 + : "cr0", "memory"); \
1.380 + __val; \
1.381 + })
1.382 +@@ -200,27 +200,27 @@
1.383 + #define __arch_atomic_decrement_val_64(mem) \
1.384 + ({ \
1.385 + __typeof (*(mem)) __val; \
1.386 +- __asm __volatile ("1: ldarx %0,0,%2\n" \
1.387 ++ __asm __volatile ("1: ldarx %0,%y1\n" \
1.388 + " subi %0,%0,1\n" \
1.389 +- " stdcx. %0,0,%2\n" \
1.390 ++ " stdcx. %0,%y1\n" \
1.391 + " bne- 1b" \
1.392 +- : "=&b" (__val), "=m" (*mem) \
1.393 +- : "b" (mem), "m" (*mem) \
1.394 ++ : "=&b" (__val), "+Z" (*(mem)) \
1.395 ++ : \
1.396 + : "cr0", "memory"); \
1.397 + __val; \
1.398 + })
1.399 +
1.400 + #define __arch_atomic_decrement_if_positive_64(mem) \
1.401 + ({ int __val, __tmp; \
1.402 +- __asm __volatile ("1: ldarx %0,0,%3\n" \
1.403 ++ __asm __volatile ("1: ldarx %0,%y2\n" \
1.404 + " cmpdi 0,%0,0\n" \
1.405 + " addi %1,%0,-1\n" \
1.406 + " ble 2f\n" \
1.407 +- " stdcx. %1,0,%3\n" \
1.408 ++ " stdcx. %1,%y2\n" \
1.409 + " bne- 1b\n" \
1.410 + "2: " __ARCH_ACQ_INSTR \
1.411 +- : "=&b" (__val), "=&r" (__tmp), "=m" (*mem) \
1.412 +- : "b" (mem), "m" (*mem) \
1.413 ++ : "=&b" (__val), "=&r" (__tmp), "+Z" (*(mem)) \
1.414 ++ : \
1.415 + : "cr0", "memory"); \
1.416 + __val; \
1.417 + })