patches/glibc/2.2.5/glibc-2.2.5-ppc405erratum77.patch
changeset 1 eeea35fbf182
     1.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     1.2 +++ b/patches/glibc/2.2.5/glibc-2.2.5-ppc405erratum77.patch	Sat Feb 24 11:00:05 2007 +0000
     1.3 @@ -0,0 +1,65 @@
     1.4 +# see http://bugs.gnu.org/cgi-bin/gnatsweb.pl?cmd=view%20audit-trail&pr=4155
     1.5 +# and http://www.kegel.com/xgcc3/ppc405erratum77.html
     1.6 +# See also matching patch for linuxthreads
     1.7 +
     1.8 +diff -aur glibc-2.2.5.orig/sysdeps/powerpc/atomicity.h glibc-2.2.5/sysdeps/powerpc/atomicity.h
     1.9 +--- glibc-2.2.5.orig/sysdeps/powerpc/atomicity.h	Thu Jul  5 21:56:01 2001
    1.10 ++++ glibc-2.2.5/sysdeps/powerpc/atomicity.h	Tue Jul 23 05:39:38 2002
    1.11 +@@ -28,6 +28,17 @@
    1.12 + # define __ATOMICITY_INLINE inline
    1.13 + #endif
    1.14 + 
    1.15 ++#ifdef __PPC405__
    1.16 ++/* workaround for PPC405 erratum #77 - Mark Hatle, dank.  References:
    1.17 ++   http://www-3.ibm.com/chips/techlib/techlib.nsf/techdocs/89DED00DEBFF54BF87256A8000491BA2/$file/405CR_C_errata_1_2.pdf
    1.18 ++   http://ppc.bkbits.net:8080/linuxppc_2_4_devel/cset@1.489
    1.19 ++   http://www.kegel.com/xgcc3/ppc405erratum77.html
    1.20 ++   FIXME: using dbct instead of sync would be faster  */
    1.21 ++#define __LIBC_PPC405_ERR77_SYNC   "sync \n\t"
    1.22 ++#else
    1.23 ++#define __LIBC_PPC405_ERR77_SYNC
    1.24 ++#endif
    1.25 ++
    1.26 + static __ATOMICITY_INLINE int
    1.27 + __attribute__ ((unused))
    1.28 + exchange_and_add (volatile uint32_t *mem, int val)
    1.29 +@@ -36,6 +47,7 @@
    1.30 +   __asm__ ("\n\
    1.31 + 0:	lwarx	%0,0,%2	\n\
    1.32 + 	add%I3	%1,%0,%3	\n\
    1.33 ++	" __LIBC_PPC405_ERR77_SYNC "\n\
    1.34 + 	stwcx.	%1,0,%2	\n\
    1.35 + 	bne-	0b	\n\
    1.36 + " : "=&b"(result), "=&r"(tmp) : "r" (mem), "Ir"(val) : "cr0", "memory");
    1.37 +@@ -50,6 +62,7 @@
    1.38 +   __asm__ ("\n\
    1.39 + 0:	lwarx	%0,0,%1	\n\
    1.40 + 	add%I2	%0,%0,%2	\n\
    1.41 ++	" __LIBC_PPC405_ERR77_SYNC "\n\
    1.42 + 	stwcx.	%0,0,%1	\n\
    1.43 + 	bne-	0b	\n\
    1.44 + " : "=&b"(tmp) : "r" (mem), "Ir"(val) : "cr0", "memory");
    1.45 +@@ -65,6 +78,7 @@
    1.46 + 	sub%I2c.	%0,%0,%2	\n\
    1.47 + 	cntlzw	%0,%0	\n\
    1.48 + 	bne-	1f	\n\
    1.49 ++	" __LIBC_PPC405_ERR77_SYNC "\n\
    1.50 + 	stwcx.	%3,0,%1	\n\
    1.51 + 	bne-	0b	\n\
    1.52 + 1:	\n\
    1.53 +@@ -79,6 +93,7 @@
    1.54 +   long int result;
    1.55 +   __asm__ ("\n\
    1.56 + 0:	lwarx	%0,0,%1	\n\
    1.57 ++	" __LIBC_PPC405_ERR77_SYNC "\n\
    1.58 + 	stwcx.	%2,0,%1	\n\
    1.59 + 	bne-	0b	\n\
    1.60 + " : "=&r"(result) : "r"(p), "r"(newval) : "cr0", "memory");
    1.61 +@@ -94,6 +109,7 @@
    1.62 + 0:	lwarx	%0,0,%1	\n\
    1.63 + 	cmpwi	%0,0	\n\
    1.64 + 	bne-	1f	\n\
    1.65 ++	" __LIBC_PPC405_ERR77_SYNC "\n\
    1.66 + 	stwcx.	%2,0,%1	\n\
    1.67 + 	bne-	0b	\n\
    1.68 + 1:	\n\