1.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
1.2 +++ b/patches/glibc/ports-2.10.1/560-ppc-atomic.patch Fri Nov 13 21:37:18 2009 +0100
1.3 @@ -0,0 +1,415 @@
1.4 +sniped from suse
1.5 +
1.6 +Index: sysdeps/powerpc/bits/atomic.h
1.7 +===================================================================
1.8 +RCS file: /cvs/glibc/libc/sysdeps/powerpc/bits/atomic.h,v
1.9 +retrieving revision 1.17
1.10 +diff -u -a -p -r1.17 atomic.h
1.11 +
1.12 +diff -durN glibc-2.10.1.orig/sysdeps/powerpc/bits/atomic.h glibc-2.10.1/sysdeps/powerpc/bits/atomic.h
1.13 +--- glibc-2.10.1.orig/sysdeps/powerpc/bits/atomic.h 2007-03-26 22:15:28.000000000 +0200
1.14 ++++ glibc-2.10.1/sysdeps/powerpc/bits/atomic.h 2009-11-13 00:51:19.000000000 +0100
1.15 +@@ -85,14 +85,14 @@
1.16 + __typeof (*(mem)) __tmp; \
1.17 + __typeof (mem) __memp = (mem); \
1.18 + __asm __volatile ( \
1.19 +- "1: lwarx %0,0,%1" MUTEX_HINT_ACQ "\n" \
1.20 ++ "1: lwarx %0,%y1" MUTEX_HINT_ACQ "\n" \
1.21 + " cmpw %0,%2\n" \
1.22 + " bne 2f\n" \
1.23 +- " stwcx. %3,0,%1\n" \
1.24 ++ " stwcx. %3,%y1\n" \
1.25 + " bne- 1b\n" \
1.26 + "2: " __ARCH_ACQ_INSTR \
1.27 +- : "=&r" (__tmp) \
1.28 +- : "b" (__memp), "r" (oldval), "r" (newval) \
1.29 ++ : "=&r" (__tmp), "+Z" (*__memp) \
1.30 ++ : "r" (oldval), "r" (newval) \
1.31 + : "cr0", "memory"); \
1.32 + __tmp; \
1.33 + })
1.34 +@@ -102,14 +102,14 @@
1.35 + __typeof (*(mem)) __tmp; \
1.36 + __typeof (mem) __memp = (mem); \
1.37 + __asm __volatile (__ARCH_REL_INSTR "\n" \
1.38 +- "1: lwarx %0,0,%1" MUTEX_HINT_REL "\n" \
1.39 ++ "1: lwarx %0,%y1" MUTEX_HINT_REL "\n" \
1.40 + " cmpw %0,%2\n" \
1.41 + " bne 2f\n" \
1.42 +- " stwcx. %3,0,%1\n" \
1.43 ++ " stwcx. %3,%y1\n" \
1.44 + " bne- 1b\n" \
1.45 + "2: " \
1.46 +- : "=&r" (__tmp) \
1.47 +- : "b" (__memp), "r" (oldval), "r" (newval) \
1.48 ++ : "=&r" (__tmp), "+Z" (__memp) \
1.49 ++ : "r" (oldval), "r" (newval) \
1.50 + : "cr0", "memory"); \
1.51 + __tmp; \
1.52 + })
1.53 +@@ -118,12 +118,12 @@
1.54 + ({ \
1.55 + __typeof (*mem) __val; \
1.56 + __asm __volatile ( \
1.57 +- "1: lwarx %0,0,%2" MUTEX_HINT_ACQ "\n" \
1.58 +- " stwcx. %3,0,%2\n" \
1.59 ++ "1: lwarx %0,%y1" MUTEX_HINT_ACQ "\n" \
1.60 ++ " stwcx. %2,%y1\n" \
1.61 + " bne- 1b\n" \
1.62 + " " __ARCH_ACQ_INSTR \
1.63 +- : "=&r" (__val), "=m" (*mem) \
1.64 +- : "b" (mem), "r" (value), "m" (*mem) \
1.65 ++ : "=&r" (__val), "+Z" (*mem) \
1.66 ++ : "r" (value) \
1.67 + : "cr0", "memory"); \
1.68 + __val; \
1.69 + })
1.70 +@@ -132,11 +132,11 @@
1.71 + ({ \
1.72 + __typeof (*mem) __val; \
1.73 + __asm __volatile (__ARCH_REL_INSTR "\n" \
1.74 +- "1: lwarx %0,0,%2" MUTEX_HINT_REL "\n" \
1.75 +- " stwcx. %3,0,%2\n" \
1.76 ++ "1: lwarx %0,%y1" MUTEX_HINT_REL "\n" \
1.77 ++ " stwcx. %2,%y1\n" \
1.78 + " bne- 1b" \
1.79 +- : "=&r" (__val), "=m" (*mem) \
1.80 +- : "b" (mem), "r" (value), "m" (*mem) \
1.81 ++ : "=&r" (__val), "+Z" (*mem) \
1.82 ++ : "r" (value) \
1.83 + : "cr0", "memory"); \
1.84 + __val; \
1.85 + })
1.86 +@@ -144,12 +144,12 @@
1.87 + #define __arch_atomic_exchange_and_add_32(mem, value) \
1.88 + ({ \
1.89 + __typeof (*mem) __val, __tmp; \
1.90 +- __asm __volatile ("1: lwarx %0,0,%3\n" \
1.91 +- " add %1,%0,%4\n" \
1.92 +- " stwcx. %1,0,%3\n" \
1.93 ++ __asm __volatile ("1: lwarx %0,%y2\n" \
1.94 ++ " add %1,%0,%3\n" \
1.95 ++ " stwcx. %1,%y2\n" \
1.96 + " bne- 1b" \
1.97 +- : "=&b" (__val), "=&r" (__tmp), "=m" (*mem) \
1.98 +- : "b" (mem), "r" (value), "m" (*mem) \
1.99 ++ : "=&b" (__val), "=&r" (__tmp), "+Z" (*mem) \
1.100 ++ : "r" (value) \
1.101 + : "cr0", "memory"); \
1.102 + __val; \
1.103 + })
1.104 +@@ -157,12 +157,12 @@
1.105 + #define __arch_atomic_increment_val_32(mem) \
1.106 + ({ \
1.107 + __typeof (*(mem)) __val; \
1.108 +- __asm __volatile ("1: lwarx %0,0,%2\n" \
1.109 ++ __asm __volatile ("1: lwarx %0,%y1\n" \
1.110 + " addi %0,%0,1\n" \
1.111 +- " stwcx. %0,0,%2\n" \
1.112 ++ " stwcx. %0,%y1\n" \
1.113 + " bne- 1b" \
1.114 +- : "=&b" (__val), "=m" (*mem) \
1.115 +- : "b" (mem), "m" (*mem) \
1.116 ++ : "=&b" (__val), "+Z" (*mem) \
1.117 ++ : \
1.118 + : "cr0", "memory"); \
1.119 + __val; \
1.120 + })
1.121 +@@ -170,27 +170,27 @@
1.122 + #define __arch_atomic_decrement_val_32(mem) \
1.123 + ({ \
1.124 + __typeof (*(mem)) __val; \
1.125 +- __asm __volatile ("1: lwarx %0,0,%2\n" \
1.126 ++ __asm __volatile ("1: lwarx %0,%y1\n" \
1.127 + " subi %0,%0,1\n" \
1.128 +- " stwcx. %0,0,%2\n" \
1.129 ++ " stwcx. %0,%y1\n" \
1.130 + " bne- 1b" \
1.131 +- : "=&b" (__val), "=m" (*mem) \
1.132 +- : "b" (mem), "m" (*mem) \
1.133 ++ : "=&b" (__val), "+Z" (*mem) \
1.134 ++ : \
1.135 + : "cr0", "memory"); \
1.136 + __val; \
1.137 + })
1.138 +
1.139 + #define __arch_atomic_decrement_if_positive_32(mem) \
1.140 + ({ int __val, __tmp; \
1.141 +- __asm __volatile ("1: lwarx %0,0,%3\n" \
1.142 ++ __asm __volatile ("1: lwarx %0,%y2\n" \
1.143 + " cmpwi 0,%0,0\n" \
1.144 + " addi %1,%0,-1\n" \
1.145 + " ble 2f\n" \
1.146 +- " stwcx. %1,0,%3\n" \
1.147 ++ " stwcx. %1,%y2\n" \
1.148 + " bne- 1b\n" \
1.149 + "2: " __ARCH_ACQ_INSTR \
1.150 +- : "=&b" (__val), "=&r" (__tmp), "=m" (*mem) \
1.151 +- : "b" (mem), "m" (*mem) \
1.152 ++ : "=&b" (__val), "=&r" (__tmp), "+Z" (*mem) \
1.153 ++ : \
1.154 + : "cr0", "memory"); \
1.155 + __val; \
1.156 + })
1.157 +diff -durN glibc-2.10.1.orig/sysdeps/powerpc/powerpc32/bits/atomic.h glibc-2.10.1/sysdeps/powerpc/powerpc32/bits/atomic.h
1.158 +--- glibc-2.10.1.orig/sysdeps/powerpc/powerpc32/bits/atomic.h 2007-03-26 22:15:45.000000000 +0200
1.159 ++++ glibc-2.10.1/sysdeps/powerpc/powerpc32/bits/atomic.h 2009-11-13 00:51:19.000000000 +0100
1.160 +@@ -44,14 +44,14 @@
1.161 + ({ \
1.162 + unsigned int __tmp; \
1.163 + __asm __volatile ( \
1.164 +- "1: lwarx %0,0,%1" MUTEX_HINT_ACQ "\n" \
1.165 ++ "1: lwarx %0,%y1" MUTEX_HINT_ACQ "\n" \
1.166 + " subf. %0,%2,%0\n" \
1.167 + " bne 2f\n" \
1.168 +- " stwcx. %3,0,%1\n" \
1.169 ++ " stwcx. %3,%y1\n" \
1.170 + " bne- 1b\n" \
1.171 + "2: " __ARCH_ACQ_INSTR \
1.172 +- : "=&r" (__tmp) \
1.173 +- : "b" (mem), "r" (oldval), "r" (newval) \
1.174 ++ : "=&r" (__tmp), "+Z" (*(mem)) \
1.175 ++ : "r" (oldval), "r" (newval) \
1.176 + : "cr0", "memory"); \
1.177 + __tmp != 0; \
1.178 + })
1.179 +@@ -60,14 +60,14 @@
1.180 + ({ \
1.181 + unsigned int __tmp; \
1.182 + __asm __volatile (__ARCH_REL_INSTR "\n" \
1.183 +- "1: lwarx %0,0,%1" MUTEX_HINT_REL "\n" \
1.184 ++ "1: lwarx %0,%y1" MUTEX_HINT_REL "\n" \
1.185 + " subf. %0,%2,%0\n" \
1.186 + " bne 2f\n" \
1.187 +- " stwcx. %3,0,%1\n" \
1.188 ++ " stwcx. %3,%y1\n" \
1.189 + " bne- 1b\n" \
1.190 + "2: " \
1.191 +- : "=&r" (__tmp) \
1.192 +- : "b" (mem), "r" (oldval), "r" (newval) \
1.193 ++ : "=&r" (__tmp), "+Z" (*(mem)) \
1.194 ++ : "r" (oldval), "r" (newval) \
1.195 + : "cr0", "memory"); \
1.196 + __tmp != 0; \
1.197 + })
1.198 +diff -durN glibc-2.10.1.orig/sysdeps/powerpc/powerpc64/bits/atomic.h glibc-2.10.1/sysdeps/powerpc/powerpc64/bits/atomic.h
1.199 +--- glibc-2.10.1.orig/sysdeps/powerpc/powerpc64/bits/atomic.h 2007-03-26 22:16:03.000000000 +0200
1.200 ++++ glibc-2.10.1/sysdeps/powerpc/powerpc64/bits/atomic.h 2009-11-13 00:51:19.000000000 +0100
1.201 +@@ -44,14 +44,14 @@
1.202 + ({ \
1.203 + unsigned int __tmp, __tmp2; \
1.204 + __asm __volatile (" clrldi %1,%1,32\n" \
1.205 +- "1: lwarx %0,0,%2" MUTEX_HINT_ACQ "\n" \
1.206 ++ "1: lwarx %0,%y2" MUTEX_HINT_ACQ "\n" \
1.207 + " subf. %0,%1,%0\n" \
1.208 + " bne 2f\n" \
1.209 +- " stwcx. %4,0,%2\n" \
1.210 ++ " stwcx. %4,%y2\n" \
1.211 + " bne- 1b\n" \
1.212 + "2: " __ARCH_ACQ_INSTR \
1.213 +- : "=&r" (__tmp), "=r" (__tmp2) \
1.214 +- : "b" (mem), "1" (oldval), "r" (newval) \
1.215 ++ : "=&r" (__tmp), "=r" (__tmp2), "+Z" (*(mem)) \
1.216 ++ : "1" (oldval), "r" (newval) \
1.217 + : "cr0", "memory"); \
1.218 + __tmp != 0; \
1.219 + })
1.220 +@@ -61,14 +61,14 @@
1.221 + unsigned int __tmp, __tmp2; \
1.222 + __asm __volatile (__ARCH_REL_INSTR "\n" \
1.223 + " clrldi %1,%1,32\n" \
1.224 +- "1: lwarx %0,0,%2" MUTEX_HINT_REL "\n" \
1.225 ++ "1: lwarx %0,%y2" MUTEX_HINT_REL "\n" \
1.226 + " subf. %0,%1,%0\n" \
1.227 + " bne 2f\n" \
1.228 +- " stwcx. %4,0,%2\n" \
1.229 ++ " stwcx. %4,%y2\n" \
1.230 + " bne- 1b\n" \
1.231 + "2: " \
1.232 +- : "=&r" (__tmp), "=r" (__tmp2) \
1.233 +- : "b" (mem), "1" (oldval), "r" (newval) \
1.234 ++ : "=&r" (__tmp), "=r" (__tmp2), "+Z" (*(mem)) \
1.235 ++ : "1" (oldval), "r" (newval) \
1.236 + : "cr0", "memory"); \
1.237 + __tmp != 0; \
1.238 + })
1.239 +@@ -82,14 +82,14 @@
1.240 + ({ \
1.241 + unsigned long __tmp; \
1.242 + __asm __volatile ( \
1.243 +- "1: ldarx %0,0,%1" MUTEX_HINT_ACQ "\n" \
1.244 ++ "1: ldarx %0,%y1" MUTEX_HINT_ACQ "\n" \
1.245 + " subf. %0,%2,%0\n" \
1.246 + " bne 2f\n" \
1.247 +- " stdcx. %3,0,%1\n" \
1.248 ++ " stdcx. %3,%y1\n" \
1.249 + " bne- 1b\n" \
1.250 + "2: " __ARCH_ACQ_INSTR \
1.251 +- : "=&r" (__tmp) \
1.252 +- : "b" (mem), "r" (oldval), "r" (newval) \
1.253 ++ : "=&r" (__tmp), "+Z" (*(mem)) \
1.254 ++ : "r" (oldval), "r" (newval) \
1.255 + : "cr0", "memory"); \
1.256 + __tmp != 0; \
1.257 + })
1.258 +@@ -98,14 +98,14 @@
1.259 + ({ \
1.260 + unsigned long __tmp; \
1.261 + __asm __volatile (__ARCH_REL_INSTR "\n" \
1.262 +- "1: ldarx %0,0,%2" MUTEX_HINT_REL "\n" \
1.263 ++ "1: ldarx %0,%y1" MUTEX_HINT_REL "\n" \
1.264 + " subf. %0,%2,%0\n" \
1.265 + " bne 2f\n" \
1.266 +- " stdcx. %3,0,%1\n" \
1.267 ++ " stdcx. %3,%y1\n" \
1.268 + " bne- 1b\n" \
1.269 + "2: " \
1.270 +- : "=&r" (__tmp) \
1.271 +- : "b" (mem), "r" (oldval), "r" (newval) \
1.272 ++ : "=&r" (__tmp), "+Z" (*(mem)) \
1.273 ++ : "r" (oldval), "r" (newval) \
1.274 + : "cr0", "memory"); \
1.275 + __tmp != 0; \
1.276 + })
1.277 +@@ -115,14 +115,14 @@
1.278 + __typeof (*(mem)) __tmp; \
1.279 + __typeof (mem) __memp = (mem); \
1.280 + __asm __volatile ( \
1.281 +- "1: ldarx %0,0,%1" MUTEX_HINT_ACQ "\n" \
1.282 ++ "1: ldarx %0,%y1" MUTEX_HINT_ACQ "\n" \
1.283 + " cmpd %0,%2\n" \
1.284 + " bne 2f\n" \
1.285 +- " stdcx. %3,0,%1\n" \
1.286 ++ " stdcx. %3,%y1\n" \
1.287 + " bne- 1b\n" \
1.288 + "2: " __ARCH_ACQ_INSTR \
1.289 +- : "=&r" (__tmp) \
1.290 +- : "b" (__memp), "r" (oldval), "r" (newval) \
1.291 ++ : "=&r" (__tmp), "+Z" (*__memp) \
1.292 ++ : "r" (oldval), "r" (newval) \
1.293 + : "cr0", "memory"); \
1.294 + __tmp; \
1.295 + })
1.296 +@@ -132,14 +132,14 @@
1.297 + __typeof (*(mem)) __tmp; \
1.298 + __typeof (mem) __memp = (mem); \
1.299 + __asm __volatile (__ARCH_REL_INSTR "\n" \
1.300 +- "1: ldarx %0,0,%1" MUTEX_HINT_REL "\n" \
1.301 ++ "1: ldarx %0,%y1" MUTEX_HINT_REL "\n" \
1.302 + " cmpd %0,%2\n" \
1.303 + " bne 2f\n" \
1.304 +- " stdcx. %3,0,%1\n" \
1.305 ++ " stdcx. %3,%y1\n" \
1.306 + " bne- 1b\n" \
1.307 + "2: " \
1.308 +- : "=&r" (__tmp) \
1.309 +- : "b" (__memp), "r" (oldval), "r" (newval) \
1.310 ++ : "=&r" (__tmp), "+Z" (*__memp) \
1.311 ++ : "r" (oldval), "r" (newval) \
1.312 + : "cr0", "memory"); \
1.313 + __tmp; \
1.314 + })
1.315 +@@ -148,12 +148,12 @@
1.316 + ({ \
1.317 + __typeof (*mem) __val; \
1.318 + __asm __volatile (__ARCH_REL_INSTR "\n" \
1.319 +- "1: ldarx %0,0,%2" MUTEX_HINT_ACQ "\n" \
1.320 +- " stdcx. %3,0,%2\n" \
1.321 ++ "1: ldarx %0,%y1" MUTEX_HINT_ACQ "\n" \
1.322 ++ " stdcx. %2,%y1\n" \
1.323 + " bne- 1b\n" \
1.324 + " " __ARCH_ACQ_INSTR \
1.325 +- : "=&r" (__val), "=m" (*mem) \
1.326 +- : "b" (mem), "r" (value), "m" (*mem) \
1.327 ++ : "=&r" (__val), "+Z" (*(mem)) \
1.328 ++ : "r" (value) \
1.329 + : "cr0", "memory"); \
1.330 + __val; \
1.331 + })
1.332 +@@ -162,11 +162,11 @@
1.333 + ({ \
1.334 + __typeof (*mem) __val; \
1.335 + __asm __volatile (__ARCH_REL_INSTR "\n" \
1.336 +- "1: ldarx %0,0,%2" MUTEX_HINT_REL "\n" \
1.337 +- " stdcx. %3,0,%2\n" \
1.338 ++ "1: ldarx %0,%y1" MUTEX_HINT_REL "\n" \
1.339 ++ " stdcx. %2,%y1\n" \
1.340 + " bne- 1b" \
1.341 +- : "=&r" (__val), "=m" (*mem) \
1.342 +- : "b" (mem), "r" (value), "m" (*mem) \
1.343 ++ : "=&r" (__val), "+Z" (*(mem)) \
1.344 ++ : "r" (value) \
1.345 + : "cr0", "memory"); \
1.346 + __val; \
1.347 + })
1.348 +@@ -174,12 +174,12 @@
1.349 + #define __arch_atomic_exchange_and_add_64(mem, value) \
1.350 + ({ \
1.351 + __typeof (*mem) __val, __tmp; \
1.352 +- __asm __volatile ("1: ldarx %0,0,%3\n" \
1.353 +- " add %1,%0,%4\n" \
1.354 +- " stdcx. %1,0,%3\n" \
1.355 ++ __asm __volatile ("1: ldarx %0,%y2\n" \
1.356 ++ " add %1,%0,%3\n" \
1.357 ++ " stdcx. %1,%y2\n" \
1.358 + " bne- 1b" \
1.359 +- : "=&b" (__val), "=&r" (__tmp), "=m" (*mem) \
1.360 +- : "b" (mem), "r" (value), "m" (*mem) \
1.361 ++ : "=&b" (__val), "=&r" (__tmp), "+Z" (*(mem)) \
1.362 ++ : "r" (value) \
1.363 + : "cr0", "memory"); \
1.364 + __val; \
1.365 + })
1.366 +@@ -187,12 +187,12 @@
1.367 + #define __arch_atomic_increment_val_64(mem) \
1.368 + ({ \
1.369 + __typeof (*(mem)) __val; \
1.370 +- __asm __volatile ("1: ldarx %0,0,%2\n" \
1.371 ++ __asm __volatile ("1: ldarx %0,%y1\n" \
1.372 + " addi %0,%0,1\n" \
1.373 +- " stdcx. %0,0,%2\n" \
1.374 ++ " stdcx. %0,%y1\n" \
1.375 + " bne- 1b" \
1.376 +- : "=&b" (__val), "=m" (*mem) \
1.377 +- : "b" (mem), "m" (*mem) \
1.378 ++ : "=&b" (__val), "+Z" (*(mem)) \
1.379 ++ : \
1.380 + : "cr0", "memory"); \
1.381 + __val; \
1.382 + })
1.383 +@@ -200,27 +200,27 @@
1.384 + #define __arch_atomic_decrement_val_64(mem) \
1.385 + ({ \
1.386 + __typeof (*(mem)) __val; \
1.387 +- __asm __volatile ("1: ldarx %0,0,%2\n" \
1.388 ++ __asm __volatile ("1: ldarx %0,%y1\n" \
1.389 + " subi %0,%0,1\n" \
1.390 +- " stdcx. %0,0,%2\n" \
1.391 ++ " stdcx. %0,%y1\n" \
1.392 + " bne- 1b" \
1.393 +- : "=&b" (__val), "=m" (*mem) \
1.394 +- : "b" (mem), "m" (*mem) \
1.395 ++ : "=&b" (__val), "+Z" (*(mem)) \
1.396 ++ : \
1.397 + : "cr0", "memory"); \
1.398 + __val; \
1.399 + })
1.400 +
1.401 + #define __arch_atomic_decrement_if_positive_64(mem) \
1.402 + ({ int __val, __tmp; \
1.403 +- __asm __volatile ("1: ldarx %0,0,%3\n" \
1.404 ++ __asm __volatile ("1: ldarx %0,%y2\n" \
1.405 + " cmpdi 0,%0,0\n" \
1.406 + " addi %1,%0,-1\n" \
1.407 + " ble 2f\n" \
1.408 +- " stdcx. %1,0,%3\n" \
1.409 ++ " stdcx. %1,%y2\n" \
1.410 + " bne- 1b\n" \
1.411 + "2: " __ARCH_ACQ_INSTR \
1.412 +- : "=&b" (__val), "=&r" (__tmp), "=m" (*mem) \
1.413 +- : "b" (mem), "m" (*mem) \
1.414 ++ : "=&b" (__val), "=&r" (__tmp), "+Z" (*(mem)) \
1.415 ++ : \
1.416 + : "cr0", "memory"); \
1.417 + __val; \
1.418 + })