samples/powerpc-e500v2-linux-gnuspe/crosstool.config
author Esben Haabendal <esben.haabendal@prevas.dk>
Wed Sep 26 16:41:02 2012 +0200 (2012-09-26)
changeset 3077 0e06812acc5c
parent 2953 b0f1b8711716
child 3175 efad82bf7b9b
permissions -rw-r--r--
libc/uClibc: add workaround patch for ICE in m68k builds

This patch/workaround is similar to the one proposed in
http://www.mail-archive.com/uclibc@uclibc.org/msg02475.html

Bug reproduced with GCC 4.6.3.

[ALL ] In file included from libc/inet/inet_ntoa.c:8:0:
[ALL ] libc/inet/addr.c: In function 'inet_ntoa_r':
[ALL ] libc/inet/addr.c:135:1: warning: visibility attribute not supported in this configuration; ignored [-Wattri
butes]
[ERROR] libc/inet/addr.c:135:1: internal compiler error: in output_move_qimode, at config/m68k/m68k.c:3160

Signed-off-by: "Esben Haabendal" <esben@haabendal.dk>
Message-Id: <87sja4d1ke.fsf@arh128.prevas.dk>
Patchwork-Id: 187181
     1 CT_EXPERIMENTAL=y
     2 CT_LOCAL_TARBALLS_DIR="${HOME}/src"
     3 CT_SAVE_TARBALLS=y
     4 CT_LOG_EXTRA=y
     5 CT_ARCH_CPU="8548"
     6 CT_ARCH_TUNE="8548"
     7 CT_TARGET_CFLAGS="-mfloat-gprs=double -Wa,-me500x2"
     8 CT_ARCH_powerpc=y
     9 CT_ARCH_powerpc_ABI_SPE=y
    10 CT_TARGET_VENDOR="e500v2"
    11 CT_KERNEL_linux=y
    12 CT_KERNEL_V_2_6_36_4=y
    13 CT_BINUTILS_V_2_20_1a=y
    14 CT_BINUTILS_EXTRA_CONFIG_ARRAY="--enable-spe=yes --enable-e500x2 --with-e500x2"
    15 CT_BINUTILS_FOR_TARGET=y
    16 CT_CC_GCC_SHOW_LINARO=y
    17 CT_CC_V_4_6_0=y
    18 CT_CC_LANG_CXX=y
    19 CT_CC_EXTRA_CONFIG_ARRAY="--with-long-double-128"
    20 # CT_CC_GCC_ENABLE_TARGET_OPTSPACE is not set
    21 # CT_CC_GCC_SJLJ_EXCEPTIONS is not set
    22 CT_LIBC_EGLIBC_V_2_10=y
    23 # CT_LIBC_GLIBC_FORCE_UNWIND is not set
    24 CT_LIBC_GLIBC_USE_PORTS=y
    25 CT_DEBUG_duma=y
    26 CT_DEBUG_gdb=y
    27 CT_GDB_NATIVE=y
    28 CT_GDB_NATIVE_STATIC=y
    29 CT_GDB_V_7_1a=y
    30 CT_DEBUG_ltrace=y
    31 CT_DEBUG_strace=y
    32 CT_STRACE_V_4_5_20=y
    33 CT_GMP_V_5_0_1=y
    34 CT_MPFR_V_3_0_0=y
    35 CT_CLOOG_V_0_15_10=y
    36 CT_MPC_V_0_8_2=y
    37 CT_TEST_SUITE_GCC=y