patches/gcc/4.3.4/380-pr37436.patch
author "Yann E. MORIN" <yann.morin.1998@anciens.enib.fr>
Fri Aug 19 00:52:05 2011 +0200 (2011-08-19)
branch1.12
changeset 2633 22e779b0a4ed
permissions -rw-r--r--
scripts: simplify and fix the toolchain config script

The script that is installed, and which sole purpose is to dump
the .config that was used to build the toolchain, is pure insanity.

Let's make it much, much more simpler...

Signed-off-by: "Yann E. MORIN" <yann.morin.1998@anciens.enib.fr>
(transplanted from 814ea73df7e0fab3db1cbe7623932714359c732b)
     1 gcc svn 142778:
     2 
     3 PR target/37436
     4 * arm.c (arm_legitimate_index): Only accept addresses that are in
     5 canonical form.
     6 * predicates.md (arm_reg_or_extendqisi_mem_op): New predicate.
     7 * arm.md (extendqihi2): Use arm_reg_or_extendqisi_mem_op predicate
     8 for operand1.
     9 (extendqisi2): Likewise.
    10 (arm_extendqisi, arm_extendqisi_v6): Use arm_extendqisi_mem_op
    11 predicate for operand1.
    12 
    13 diff -Nura gcc-4.3.3.orig/gcc/config/arm/arm.c gcc-4.3.3/gcc/config/arm/arm.c
    14 --- gcc-4.3.3.orig/gcc/config/arm/arm.c	2008-06-11 07:52:55.000000000 -0300
    15 +++ gcc-4.3.3/gcc/config/arm/arm.c	2009-05-21 16:06:45.000000000 -0300
    16 @@ -3769,6 +3769,7 @@
    17        rtx xop1 = XEXP (x, 1);
    18  
    19        return ((arm_address_register_rtx_p (xop0, strict_p)
    20 +	       && GET_CODE(xop1) == CONST_INT
    21  	       && arm_legitimate_index_p (mode, xop1, outer, strict_p))
    22  	      || (arm_address_register_rtx_p (xop1, strict_p)
    23  		  && arm_legitimate_index_p (mode, xop0, outer, strict_p)));
    24 diff -Nura gcc-4.3.3.orig/gcc/config/arm/arm.md gcc-4.3.3/gcc/config/arm/arm.md
    25 --- gcc-4.3.3.orig/gcc/config/arm/arm.md	2007-09-04 01:44:47.000000000 -0300
    26 +++ gcc-4.3.3/gcc/config/arm/arm.md	2009-05-21 16:06:45.000000000 -0300
    27 @@ -4199,7 +4199,7 @@
    28  
    29  (define_expand "extendqihi2"
    30    [(set (match_dup 2)
    31 -	(ashift:SI (match_operand:QI 1 "general_operand" "")
    32 +	(ashift:SI (match_operand:QI 1 "arm_reg_or_extendqisi_mem_op" "")
    33  		   (const_int 24)))
    34     (set (match_operand:HI 0 "s_register_operand" "")
    35  	(ashiftrt:SI (match_dup 2)
    36 @@ -4224,7 +4224,7 @@
    37  
    38  (define_insn "*arm_extendqihi_insn"
    39    [(set (match_operand:HI 0 "s_register_operand" "=r")
    40 -	(sign_extend:HI (match_operand:QI 1 "memory_operand" "Uq")))]
    41 +	(sign_extend:HI (match_operand:QI 1 "arm_extendqisi_mem_op" "Uq")))]
    42    "TARGET_ARM && arm_arch4"
    43    "ldr%(sb%)\\t%0, %1"
    44    [(set_attr "type" "load_byte")
    45 @@ -4235,7 +4235,7 @@
    46  
    47  (define_expand "extendqisi2"
    48    [(set (match_dup 2)
    49 -	(ashift:SI (match_operand:QI 1 "general_operand" "")
    50 +	(ashift:SI (match_operand:QI 1 "arm_reg_or_extendqisi_mem_op" "")
    51  		   (const_int 24)))
    52     (set (match_operand:SI 0 "s_register_operand" "")
    53  	(ashiftrt:SI (match_dup 2)
    54 @@ -4267,7 +4267,7 @@
    55  
    56  (define_insn "*arm_extendqisi"
    57    [(set (match_operand:SI 0 "s_register_operand" "=r")
    58 -	(sign_extend:SI (match_operand:QI 1 "memory_operand" "Uq")))]
    59 +	(sign_extend:SI (match_operand:QI 1 "arm_extendqisi_mem_op" "Uq")))]
    60    "TARGET_ARM && arm_arch4 && !arm_arch6"
    61    "ldr%(sb%)\\t%0, %1"
    62    [(set_attr "type" "load_byte")
    63 @@ -4278,7 +4278,8 @@
    64  
    65  (define_insn "*arm_extendqisi_v6"
    66    [(set (match_operand:SI 0 "s_register_operand" "=r,r")
    67 -	(sign_extend:SI (match_operand:QI 1 "nonimmediate_operand" "r,Uq")))]
    68 +	(sign_extend:SI
    69 +	 (match_operand:QI 1 "arm_reg_or_extendqisi_mem_op" "r,Uq")))]
    70    "TARGET_ARM && arm_arch6"
    71    "@
    72     sxtb%?\\t%0, %1
    73 diff -Nura gcc-4.3.3.orig/gcc/config/arm/predicates.md gcc-4.3.3/gcc/config/arm/predicates.md
    74 --- gcc-4.3.3.orig/gcc/config/arm/predicates.md	2007-08-02 07:49:31.000000000 -0300
    75 +++ gcc-4.3.3/gcc/config/arm/predicates.md	2009-05-21 16:06:45.000000000 -0300
    76 @@ -234,6 +234,10 @@
    77         (match_test "arm_legitimate_address_p (mode, XEXP (op, 0), SIGN_EXTEND,
    78  					      0)")))
    79  
    80 +(define_special_predicate "arm_reg_or_extendqisi_mem_op"
    81 +  (ior (match_operand 0 "arm_extendqisi_mem_op")
    82 +       (match_operand 0 "s_register_operand")))
    83 +
    84  (define_predicate "power_of_two_operand"
    85    (match_code "const_int")
    86  {