patches/glibc/2.2.5/glibc-2.2.5-ppc405erratum77.patch
author "Yann E. MORIN" <yann.morin.1998@anciens.enib.fr>
Sat Jul 28 21:34:41 2007 +0000 (2007-07-28)
changeset 301 2be7232a73ac
permissions -rw-r--r--
Bump version to 0.2.2.
     1 # see http://bugs.gnu.org/cgi-bin/gnatsweb.pl?cmd=view%20audit-trail&pr=4155
     2 # and http://www.kegel.com/xgcc3/ppc405erratum77.html
     3 # See also matching patch for linuxthreads
     4 
     5 diff -aur glibc-2.2.5.orig/sysdeps/powerpc/atomicity.h glibc-2.2.5/sysdeps/powerpc/atomicity.h
     6 --- glibc-2.2.5.orig/sysdeps/powerpc/atomicity.h	Thu Jul  5 21:56:01 2001
     7 +++ glibc-2.2.5/sysdeps/powerpc/atomicity.h	Tue Jul 23 05:39:38 2002
     8 @@ -28,6 +28,17 @@
     9  # define __ATOMICITY_INLINE inline
    10  #endif
    11  
    12 +#ifdef __PPC405__
    13 +/* workaround for PPC405 erratum #77 - Mark Hatle, dank.  References:
    14 +   http://www-3.ibm.com/chips/techlib/techlib.nsf/techdocs/89DED00DEBFF54BF87256A8000491BA2/$file/405CR_C_errata_1_2.pdf
    15 +   http://ppc.bkbits.net:8080/linuxppc_2_4_devel/cset@1.489
    16 +   http://www.kegel.com/xgcc3/ppc405erratum77.html
    17 +   FIXME: using dbct instead of sync would be faster  */
    18 +#define __LIBC_PPC405_ERR77_SYNC   "sync \n\t"
    19 +#else
    20 +#define __LIBC_PPC405_ERR77_SYNC
    21 +#endif
    22 +
    23  static __ATOMICITY_INLINE int
    24  __attribute__ ((unused))
    25  exchange_and_add (volatile uint32_t *mem, int val)
    26 @@ -36,6 +47,7 @@
    27    __asm__ ("\n\
    28  0:	lwarx	%0,0,%2	\n\
    29  	add%I3	%1,%0,%3	\n\
    30 +	" __LIBC_PPC405_ERR77_SYNC "\n\
    31  	stwcx.	%1,0,%2	\n\
    32  	bne-	0b	\n\
    33  " : "=&b"(result), "=&r"(tmp) : "r" (mem), "Ir"(val) : "cr0", "memory");
    34 @@ -50,6 +62,7 @@
    35    __asm__ ("\n\
    36  0:	lwarx	%0,0,%1	\n\
    37  	add%I2	%0,%0,%2	\n\
    38 +	" __LIBC_PPC405_ERR77_SYNC "\n\
    39  	stwcx.	%0,0,%1	\n\
    40  	bne-	0b	\n\
    41  " : "=&b"(tmp) : "r" (mem), "Ir"(val) : "cr0", "memory");
    42 @@ -65,6 +78,7 @@
    43  	sub%I2c.	%0,%0,%2	\n\
    44  	cntlzw	%0,%0	\n\
    45  	bne-	1f	\n\
    46 +	" __LIBC_PPC405_ERR77_SYNC "\n\
    47  	stwcx.	%3,0,%1	\n\
    48  	bne-	0b	\n\
    49  1:	\n\
    50 @@ -79,6 +93,7 @@
    51    long int result;
    52    __asm__ ("\n\
    53  0:	lwarx	%0,0,%1	\n\
    54 +	" __LIBC_PPC405_ERR77_SYNC "\n\
    55  	stwcx.	%2,0,%1	\n\
    56  	bne-	0b	\n\
    57  " : "=&r"(result) : "r"(p), "r"(newval) : "cr0", "memory");
    58 @@ -94,6 +109,7 @@
    59  0:	lwarx	%0,0,%1	\n\
    60  	cmpwi	%0,0	\n\
    61  	bne-	1f	\n\
    62 +	" __LIBC_PPC405_ERR77_SYNC "\n\
    63  	stwcx.	%2,0,%1	\n\
    64  	bne-	0b	\n\
    65  1:	\n\