patches/glibc/ports-2.10.1/570-arm-cirrus-ep93xx-maverick-crunch-fpu.patch
author Arnaud Lacombe <lacombar@gmail.com>
Thu Aug 05 17:59:51 2010 +0200 (2010-08-05)
changeset 2069 366bd2b22675
permissions -rw-r--r--
complibs/mpc: fix MPC 0.8.1 build with MPFR 3.0.0

This is the change introduced by revision 734 of MPC repository.

Author: Paul Zimmermann <Paul.Zimmermann@loria.fr>
Revision log: [acos.c] fixed problem with GMP_RNDA (should be MPFR_RNDA, and code was wrong)

Signed-off-by: Arnaud Lacombe <lacombar@gmail.com>
     1 http://yann.poupet.free.fr/ep93xx/
     2 Add support for the Maverick Crunch FPU on Cirrus EP93XX processor series
     3 
     4 diff -durN glibc-2.10.1.orig/glibc-ports-2.10.1/sysdeps/arm/bits/endian.h glibc-2.10.1/glibc-ports-2.10.1/sysdeps/arm/bits/endian.h
     5 --- glibc-2.10.1.orig/glibc-ports-2.10.1/sysdeps/arm/bits/endian.h	2009-05-16 10:36:20.000000000 +0200
     6 +++ glibc-2.10.1/glibc-ports-2.10.1/sysdeps/arm/bits/endian.h	2009-11-13 00:51:22.000000000 +0100
     7 @@ -12,7 +12,7 @@
     8  /* FPA floating point units are always big-endian, irrespective of the
     9     CPU endianness.  VFP floating point units use the same endianness
    10     as the rest of the system.  */
    11 -#ifdef __VFP_FP__
    12 +#if defined __VFP_FP__ || defined __MAVERICK__
    13  #define __FLOAT_WORD_ORDER __BYTE_ORDER
    14  #else
    15  #define __FLOAT_WORD_ORDER __BIG_ENDIAN
    16 diff -durN glibc-2.10.1.orig/glibc-ports-2.10.1/sysdeps/arm/fpu/__longjmp.S glibc-2.10.1/glibc-ports-2.10.1/sysdeps/arm/fpu/__longjmp.S
    17 --- glibc-2.10.1.orig/glibc-ports-2.10.1/sysdeps/arm/fpu/__longjmp.S	2009-05-16 10:36:20.000000000 +0200
    18 +++ glibc-2.10.1/glibc-ports-2.10.1/sysdeps/arm/fpu/__longjmp.S	2009-11-13 00:51:22.000000000 +0100
    19 @@ -30,7 +30,33 @@
    20  	movs	r0, r1		/* get the return value in place */
    21  	moveq	r0, #1		/* can't let setjmp() return zero! */
    22  
    23 +#ifdef __MAVERICK__
    24 +	cfldrd	mvd4,  [ip], #8
    25 +	nop
    26 +	cfldrd	mvd5,  [ip], #8
    27 +	nop
    28 +	cfldrd	mvd6,  [ip], #8
    29 +	nop
    30 +	cfldrd	mvd7,  [ip], #8
    31 +	nop
    32 +	cfldrd	mvd8,  [ip], #8
    33 +	nop
    34 +	cfldrd	mvd9,  [ip], #8
    35 +	nop
    36 +	cfldrd	mvd10, [ip], #8
    37 +	nop
    38 +	cfldrd	mvd11, [ip], #8
    39 +	nop
    40 +	cfldrd	mvd12, [ip], #8
    41 +	nop
    42 +	cfldrd	mvd13, [ip], #8
    43 +	nop
    44 +	cfldrd	mvd14, [ip], #8
    45 +	nop
    46 +	cfldrd	mvd15, [ip], #8
    47 +#else
    48  	lfmfd	f4, 4, [ip] !	/* load the floating point regs */
    49 +#endif
    50  
    51  	LOADREGS(ia, ip, {v1-v6, sl, fp, sp, pc})
    52  END (__longjmp)
    53 diff -durN glibc-2.10.1.orig/glibc-ports-2.10.1/sysdeps/arm/fpu/bits/fenv.h glibc-2.10.1/glibc-ports-2.10.1/sysdeps/arm/fpu/bits/fenv.h
    54 --- glibc-2.10.1.orig/glibc-ports-2.10.1/sysdeps/arm/fpu/bits/fenv.h	2009-05-16 10:36:20.000000000 +0200
    55 +++ glibc-2.10.1/glibc-ports-2.10.1/sysdeps/arm/fpu/bits/fenv.h	2009-11-13 00:51:22.000000000 +0100
    56 @@ -20,6 +20,45 @@
    57  # error "Never use <bits/fenv.h> directly; include <fenv.h> instead."
    58  #endif
    59  
    60 +#if defined(__MAVERICK__)
    61 +
    62 +/* Define bits representing exceptions in the FPU status word.  */
    63 +enum
    64 +  {
    65 +    FE_INVALID = 1,
    66 +#define FE_INVALID FE_INVALID
    67 +    FE_OVERFLOW = 4,
    68 +#define FE_OVERFLOW FE_OVERFLOW
    69 +    FE_UNDERFLOW = 8,
    70 +#define FE_UNDERFLOW FE_UNDERFLOW
    71 +    FE_INEXACT = 16,
    72 +#define FE_INEXACT FE_INEXACT
    73 +  };
    74 +
    75 +/* Amount to shift by to convert an exception to a mask bit.  */
    76 +#define FE_EXCEPT_SHIFT	5
    77 +
    78 +/* All supported exceptions.  */
    79 +#define FE_ALL_EXCEPT	\
    80 +	(FE_INVALID | FE_OVERFLOW | FE_UNDERFLOW | FE_INEXACT)
    81 +
    82 +/* IEEE rounding modes.  */
    83 +enum
    84 +  {
    85 +    FE_TONEAREST = 0,
    86 +#define FE_TONEAREST    FE_TONEAREST
    87 +    FE_TOWARDZERO = 0x400,
    88 +#define FE_TOWARDZERO   FE_TOWARDZERO
    89 +    FE_DOWNWARD = 0x800,
    90 +#define FE_DOWNWARD     FE_DOWNWARD
    91 +    FE_UPWARD = 0xc00,
    92 +#define FE_UPWARD       FE_UPWARD
    93 +  };
    94 +
    95 +#define FE_ROUND_MASK (FE_UPWARD)
    96 +
    97 +#else /* FPA */
    98 +
    99  /* Define bits representing exceptions in the FPU status word.  */
   100  enum
   101    {
   102 @@ -44,6 +83,8 @@
   103     modes exist, but you have to encode them in the actual instruction.  */
   104  #define FE_TONEAREST	0
   105  
   106 +#endif
   107 +
   108  /* Type representing exception flags. */
   109  typedef unsigned long int fexcept_t;
   110  
   111 diff -durN glibc-2.10.1.orig/glibc-ports-2.10.1/sysdeps/arm/fpu/bits/setjmp.h glibc-2.10.1/glibc-ports-2.10.1/sysdeps/arm/fpu/bits/setjmp.h
   112 --- glibc-2.10.1.orig/glibc-ports-2.10.1/sysdeps/arm/fpu/bits/setjmp.h	2009-05-16 10:36:20.000000000 +0200
   113 +++ glibc-2.10.1/glibc-ports-2.10.1/sysdeps/arm/fpu/bits/setjmp.h	2009-11-13 00:51:22.000000000 +0100
   114 @@ -28,7 +28,11 @@
   115  #ifndef _ASM
   116  /* Jump buffer contains v1-v6, sl, fp, sp and pc.  Other registers are not
   117     saved.  */
   118 +#ifdef __MAVERICK__
   119 +typedef int __jmp_buf[34];
   120 +#else
   121  typedef int __jmp_buf[22];
   122  #endif
   123 +#endif
   124  
   125  #endif
   126 diff -durN glibc-2.10.1.orig/glibc-ports-2.10.1/sysdeps/arm/fpu/fegetround.c glibc-2.10.1/glibc-ports-2.10.1/sysdeps/arm/fpu/fegetround.c
   127 --- glibc-2.10.1.orig/glibc-ports-2.10.1/sysdeps/arm/fpu/fegetround.c	2009-05-16 10:36:20.000000000 +0200
   128 +++ glibc-2.10.1/glibc-ports-2.10.1/sysdeps/arm/fpu/fegetround.c	2009-11-13 00:51:22.000000000 +0100
   129 @@ -18,9 +18,21 @@
   130     02111-1307 USA.  */
   131  
   132  #include <fenv.h>
   133 +#include <fpu_control.h>
   134  
   135  int
   136  fegetround (void)
   137  {
   138 +#if defined(__MAVERICK__)
   139 +
   140 +  unsigned long temp;
   141 +
   142 +  _FPU_GETCW (temp);
   143 +  return temp & FE_ROUND_MASK;
   144 +
   145 +#else /* FPA */
   146 +
   147    return FE_TONEAREST;		/* Easy. :-) */
   148 +
   149 +#endif
   150  }
   151 diff -durN glibc-2.10.1.orig/glibc-ports-2.10.1/sysdeps/arm/fpu/fesetround.c glibc-2.10.1/glibc-ports-2.10.1/sysdeps/arm/fpu/fesetround.c
   152 --- glibc-2.10.1.orig/glibc-ports-2.10.1/sysdeps/arm/fpu/fesetround.c	2009-05-16 10:36:20.000000000 +0200
   153 +++ glibc-2.10.1/glibc-ports-2.10.1/sysdeps/arm/fpu/fesetround.c	2009-11-13 00:51:22.000000000 +0100
   154 @@ -18,12 +18,28 @@
   155     02111-1307 USA.  */
   156  
   157  #include <fenv.h>
   158 +#include <fpu_control.h>
   159  
   160  int
   161  fesetround (int round)
   162  {
   163 +#if defined(__MAVERICK__)
   164 +  unsigned long temp;
   165 +
   166 +  if (round & ~FE_ROUND_MASK)
   167 +    return 1;
   168 +
   169 +  _FPU_GETCW (temp);
   170 +  temp = (temp & ~FE_ROUND_MASK) | round;
   171 +  _FPU_SETCW (temp);
   172 +  return 0;
   173 +
   174 +#else /* FPA */
   175 +
   176    /* We only support FE_TONEAREST, so there is no need for any work.  */
   177    return (round == FE_TONEAREST)?0:1;
   178 +
   179 +#endif
   180  }
   181  
   182  libm_hidden_def (fesetround)
   183 diff -durN glibc-2.10.1.orig/glibc-ports-2.10.1/sysdeps/arm/fpu/fpu_control.h glibc-2.10.1/glibc-ports-2.10.1/sysdeps/arm/fpu/fpu_control.h
   184 --- glibc-2.10.1.orig/glibc-ports-2.10.1/sysdeps/arm/fpu/fpu_control.h	2009-05-16 10:36:20.000000000 +0200
   185 +++ glibc-2.10.1/glibc-ports-2.10.1/sysdeps/arm/fpu/fpu_control.h	2009-11-13 00:51:22.000000000 +0100
   186 @@ -1,5 +1,6 @@
   187  /* FPU control word definitions.  ARM version.
   188 -   Copyright (C) 1996, 1997, 1998, 2000 Free Software Foundation, Inc.
   189 +   Copyright (C) 1996, 1997, 1998, 2000, 2005
   190 +   Free Software Foundation, Inc.
   191     This file is part of the GNU C Library.
   192  
   193     The GNU C Library is free software; you can redistribute it and/or
   194 @@ -20,6 +21,79 @@
   195  #ifndef _FPU_CONTROL_H
   196  #define _FPU_CONTROL_H
   197  
   198 +#if defined(__MAVERICK__)
   199 +
   200 +/* DSPSC register: (from EP9312 User's Guide)
   201 + *
   202 + * bits 31..29	- DAID
   203 + * bits 28..26	- HVID
   204 + * bits 25..24	- RSVD
   205 + * bit  23	- ISAT
   206 + * bit  22	- UI
   207 + * bit  21	- INT
   208 + * bit  20	- AEXC
   209 + * bits 19..18	- SAT
   210 + * bits 17..16	- FCC
   211 + * bit  15	- V
   212 + * bit  14	- FWDEN
   213 + * bit  13	- Invalid
   214 + * bit	12	- Denorm
   215 + * bits 11..10	- RM
   216 + * bits 9..5	- IXE, UFE, OFE, RSVD, IOE
   217 + * bits 4..0	- IX, UF, OF, RSVD, IO
   218 + */
   219 +
   220 +/* masking of interrupts */
   221 +#define _FPU_MASK_IM	(1 << 5)	/* invalid operation */
   222 +#define _FPU_MASK_ZM	0		/* divide by zero */
   223 +#define _FPU_MASK_OM	(1 << 7)	/* overflow */
   224 +#define _FPU_MASK_UM	(1 << 8)	/* underflow */
   225 +#define _FPU_MASK_PM	(1 << 9)	/* inexact */
   226 +#define _FPU_MASK_DM	0		/* denormalized operation */
   227 +
   228 +#define _FPU_RESERVED	0xfffff000	/* These bits are reserved.  */
   229 +
   230 +#define _FPU_DEFAULT	0x00b00000	/* Default value.  */
   231 +#define _FPU_IEEE	0x00b003a0	/* Default + exceptions enabled. */
   232 +
   233 +/* Type of the control word.  */
   234 +typedef unsigned int fpu_control_t;
   235 +
   236 +/* Macros for accessing the hardware control word.  */
   237 +#define _FPU_GETCW(cw) ({			\
   238 +	register int __t1, __t2;		\
   239 +						\
   240 +	__asm__ volatile (			\
   241 +	"cfmvr64l	%1, mvdx0\n\t"		\
   242 +	"cfmvr64h	%2, mvdx0\n\t"		\
   243 +	"cfmv32sc	mvdx0, dspsc\n\t"	\
   244 +	"cfmvr64l	%0, mvdx0\n\t"		\
   245 +	"cfmv64lr	mvdx0, %1\n\t"		\
   246 +	"cfmv64hr	mvdx0, %2"		\
   247 +	: "=r" (cw), "=r" (__t1), "=r" (__t2)	\
   248 +	);					\
   249 +})
   250 +
   251 +#define _FPU_SETCW(cw) ({			\
   252 +	register int __t0, __t1, __t2;		\
   253 +						\
   254 +	__asm__ volatile (			\
   255 +	"cfmvr64l	%1, mvdx0\n\t"		\
   256 +	"cfmvr64h	%2, mvdx0\n\t"		\
   257 +	"cfmv64lr	mvdx0, %0\n\t"		\
   258 +	"cfmvsc32	dspsc, mvdx0\n\t"	\
   259 +	"cfmv64lr	mvdx0, %1\n\t"		\
   260 +	"cfmv64hr	mvdx0, %2"		\
   261 +	: "=r" (__t0), "=r" (__t1), "=r" (__t2)	\
   262 +	: "0" (cw)				\
   263 +	);					\
   264 +})
   265 +
   266 +/* Default control word set at startup.  */
   267 +extern fpu_control_t __fpu_control;
   268 +
   269 +#else /* FPA */
   270 +
   271  /* We have a slight terminology confusion here.  On the ARM, the register
   272   * we're interested in is actually the FPU status word - the FPU control
   273   * word is something different (which is implementation-defined and only
   274 @@ -99,4 +173,6 @@
   275  /* Default control word set at startup.  */
   276  extern fpu_control_t __fpu_control;
   277  
   278 +#endif
   279 +
   280  #endif /* _FPU_CONTROL_H */
   281 diff -durN glibc-2.10.1.orig/glibc-ports-2.10.1/sysdeps/arm/fpu/jmpbuf-offsets.h glibc-2.10.1/glibc-ports-2.10.1/sysdeps/arm/fpu/jmpbuf-offsets.h
   282 --- glibc-2.10.1.orig/glibc-ports-2.10.1/sysdeps/arm/fpu/jmpbuf-offsets.h	2009-05-16 10:36:20.000000000 +0200
   283 +++ glibc-2.10.1/glibc-ports-2.10.1/sysdeps/arm/fpu/jmpbuf-offsets.h	2009-11-13 00:51:22.000000000 +0100
   284 @@ -17,4 +17,8 @@
   285     Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
   286     02111-1307 USA.  */
   287  
   288 +#ifdef __MAVERICK__
   289 +#define __JMP_BUF_SP		32
   290 +#else
   291  #define __JMP_BUF_SP		20
   292 +#endif
   293 diff -durN glibc-2.10.1.orig/glibc-ports-2.10.1/sysdeps/arm/fpu/setjmp.S glibc-2.10.1/glibc-ports-2.10.1/sysdeps/arm/fpu/setjmp.S
   294 --- glibc-2.10.1.orig/glibc-ports-2.10.1/sysdeps/arm/fpu/setjmp.S	2009-05-16 10:36:20.000000000 +0200
   295 +++ glibc-2.10.1/glibc-ports-2.10.1/sysdeps/arm/fpu/setjmp.S	2009-11-13 00:51:22.000000000 +0100
   296 @@ -24,11 +24,41 @@
   297  
   298  ENTRY (__sigsetjmp)
   299  	/* Save registers */
   300 +#ifdef __MAVERICK__
   301 +	cfstrd	mvd4,  [r0], #8
   302 +	nop
   303 +	cfstrd	mvd5,  [r0], #8
   304 +	nop
   305 +	cfstrd	mvd6,  [r0], #8
   306 +	nop
   307 +	cfstrd	mvd7,  [r0], #8
   308 +	nop
   309 +	cfstrd	mvd8,  [r0], #8
   310 +	nop
   311 +	cfstrd	mvd9,  [r0], #8
   312 +	nop
   313 +	cfstrd	mvd10, [r0], #8
   314 +	nop
   315 +	cfstrd	mvd11, [r0], #8
   316 +	nop
   317 +	cfstrd	mvd12, [r0], #8
   318 +	nop
   319 +	cfstrd	mvd13, [r0], #8
   320 +	nop
   321 +	cfstrd	mvd14, [r0], #8
   322 +	nop
   323 +	cfstrd	mvd15, [r0], #8
   324 +#else
   325  	sfmea	f4, 4, [r0]!
   326 +#endif
   327  	stmia	r0, {v1-v6, sl, fp, sp, lr}
   328  
   329  	/* Restore pointer to jmp_buf */
   330 +#ifdef __MAVERICK__
   331 +	sub	r0, r0, #96
   332 +#else
   333  	sub	r0, r0, #48
   334 +#endif
   335  
   336  	/* Make a tail call to __sigjmp_save; it takes the same args.  */
   337  	B	PLTJMP(C_SYMBOL_NAME(__sigjmp_save))
   338 diff -durN glibc-2.10.1.orig/glibc-ports-2.10.1/sysdeps/arm/gccframe.h glibc-2.10.1/glibc-ports-2.10.1/sysdeps/arm/gccframe.h
   339 --- glibc-2.10.1.orig/glibc-ports-2.10.1/sysdeps/arm/gccframe.h	2009-05-16 10:36:20.000000000 +0200
   340 +++ glibc-2.10.1/glibc-ports-2.10.1/sysdeps/arm/gccframe.h	2009-11-13 00:51:22.000000000 +0100
   341 @@ -17,6 +17,10 @@
   342     Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
   343     02111-1307 USA.  */
   344  
   345 +#ifdef __MAVERICK__
   346 +#define FIRST_PSEUDO_REGISTER 43
   347 +#else
   348  #define FIRST_PSEUDO_REGISTER 27
   349 +#endif
   350  
   351  #include <sysdeps/generic/gccframe.h>
   352 diff -durN glibc-2.10.1.orig/glibc-ports-2.10.1/sysdeps/arm/gmp-mparam.h glibc-2.10.1/glibc-ports-2.10.1/sysdeps/arm/gmp-mparam.h
   353 --- glibc-2.10.1.orig/glibc-ports-2.10.1/sysdeps/arm/gmp-mparam.h	2009-05-16 10:36:20.000000000 +0200
   354 +++ glibc-2.10.1/glibc-ports-2.10.1/sysdeps/arm/gmp-mparam.h	2009-11-13 00:51:22.000000000 +0100
   355 @@ -29,7 +29,7 @@
   356  #if defined(__ARMEB__)
   357  # define IEEE_DOUBLE_MIXED_ENDIAN 0
   358  # define IEEE_DOUBLE_BIG_ENDIAN 1
   359 -#elif defined(__VFP_FP__)
   360 +#elif defined(__VFP_FP__) || defined(__MAVERICK__)
   361  # define IEEE_DOUBLE_MIXED_ENDIAN 0
   362  # define IEEE_DOUBLE_BIG_ENDIAN 0
   363  #else
   364 diff -durN glibc-2.10.1.orig/ports/sysdeps/arm/bits/endian.h glibc-2.10.1/ports/sysdeps/arm/bits/endian.h
   365 diff -durN glibc-2.10.1.orig/ports/sysdeps/arm/fpu/__longjmp.S glibc-2.10.1/ports/sysdeps/arm/fpu/__longjmp.S
   366 diff -durN glibc-2.10.1.orig/ports/sysdeps/arm/fpu/bits/fenv.h glibc-2.10.1/ports/sysdeps/arm/fpu/bits/fenv.h
   367 diff -durN glibc-2.10.1.orig/ports/sysdeps/arm/fpu/bits/setjmp.h glibc-2.10.1/ports/sysdeps/arm/fpu/bits/setjmp.h
   368 diff -durN glibc-2.10.1.orig/ports/sysdeps/arm/fpu/fegetround.c glibc-2.10.1/ports/sysdeps/arm/fpu/fegetround.c
   369 diff -durN glibc-2.10.1.orig/ports/sysdeps/arm/fpu/fesetround.c glibc-2.10.1/ports/sysdeps/arm/fpu/fesetround.c
   370 diff -durN glibc-2.10.1.orig/ports/sysdeps/arm/fpu/fpu_control.h glibc-2.10.1/ports/sysdeps/arm/fpu/fpu_control.h
   371 diff -durN glibc-2.10.1.orig/ports/sysdeps/arm/fpu/jmpbuf-offsets.h glibc-2.10.1/ports/sysdeps/arm/fpu/jmpbuf-offsets.h
   372 diff -durN glibc-2.10.1.orig/ports/sysdeps/arm/fpu/setjmp.S glibc-2.10.1/ports/sysdeps/arm/fpu/setjmp.S
   373 diff -durN glibc-2.10.1.orig/ports/sysdeps/arm/gccframe.h glibc-2.10.1/ports/sysdeps/arm/gccframe.h
   374 diff -durN glibc-2.10.1.orig/ports/sysdeps/arm/gmp-mparam.h glibc-2.10.1/ports/sysdeps/arm/gmp-mparam.h