samples/arm-cortex_a15-linux-gnueabi/crosstool.config
author Daniel Zimmermann <netzimme@gmail.com>
Mon Nov 25 08:56:55 2013 +0100 (2013-11-25)
changeset 3255 4f3536b12be5
parent 3105 cfb1783d4cb8
permissions -rw-r--r--
debug/strace: pump version to 4.7 and 4.8

Pump version for strace to 4.7 and 4.8.
Add patch from strace mainline.


Work around conflict between <sys/ptrace.h> and <linux/ptrace.h>

Since glibc-2.18~39 <sys/ptrace.h> defines ptrace_peeksiginfo_args
which collides with <linux/ptrace.h>.

* configure.ac: Check for `struct ptrace_peeksiginfo_args' in
<sys/ptrace.h>.
* process.c: Work around potential conflict between <sys/ptrace.h>
and <linux/ptrace.h> by redefining ptrace_peeksiginfo_args.
* signal.c: Likewise.
* syscall.c: Likewise.
* util.c: Likewise.
http://sourceforge.net/p/strace/code/ci/0b4060f61f1bb101b5d8d084714b7d2feacdb199/

Signed-off-by: "Daniel Zimmermann" <netzimme@gmail.com>
Message-Id: <67b082cf1cdc8276eb4a.1385366288@haus-VirtualBox>
Patchwork-Id: 293842
     1 CT_EXPERIMENTAL=y
     2 CT_LOCAL_TARBALLS_DIR="${HOME}/src"
     3 CT_SAVE_TARBALLS=y
     4 CT_LOG_EXTRA=y
     5 CT_ARCH_CPU="cortex-a15"
     6 CT_ARCH_TUNE="cortex-a15"
     7 CT_ARCH_FPU="neon-vfpv4"
     8 CT_ARCH_arm=y
     9 CT_TARGET_VENDOR="cortex_a15"
    10 CT_KERNEL_linux=y
    11 CT_KERNEL_V_2_6_38=y
    12 CT_BINUTILS_V_2_21_1a=y
    13 CT_BINUTILS_LINKER_LD_GOLD=y
    14 CT_BINUTILS_GOLD_THREADS=y
    15 CT_BINUTILS_LD_WRAPPER=y
    16 CT_CC_GCC_SHOW_LINARO=y
    17 CT_CC_LANG_FORTRAN=y
    18 CT_CC_LANG_CXX=y
    19 CT_CC_CORE_EXTRA_CONFIG_ARRAY="--with-float=hard"
    20 CT_CC_EXTRA_CONFIG_ARRAY="--with-float=hard"
    21 CT_LIBC_glibc=y
    22 CT_LIBC_GLIBC_V_2_12_1=y
    23 CT_DEBUG_dmalloc=y
    24 CT_DEBUG_duma=y
    25 CT_DEBUG_gdb=y
    26 CT_GDB_CROSS_STATIC=y
    27 CT_GDB_NATIVE=y
    28 CT_GDB_NATIVE_STATIC=y
    29 CT_DEBUG_GDB_SHOW_LINARO=y
    30 CT_GDB_V_linaro_7_2_2011_05_0=y
    31 CT_DEBUG_ltrace=y
    32 CT_DEBUG_strace=y
    33 CT_STRACE_V_4_5_19=y
    34 CT_GMP_V_5_0_1=y
    35 CT_MPFR_V_3_0_1=y
    36 CT_TEST_SUITE_GCC=y