samples/powerpc-e500v2-linux-gnuspe/reported.by
author "Yann E. MORIN" <yann.morin.1998@anciens.enib.fr>
Sun Nov 16 20:37:39 2008 +0000 (2008-11-16)
changeset 1045 b665e9fb06f9
parent 930 a98f0615133f
child 1076 faaf799d6b5e
permissions -rw-r--r--
Make strace 4.5.17 and 4.5.18 build with latest uClibc (which no longer install cachectl.h).
Patch from OpenEmbedded, by Khem (RAJ?), and forwarded by Joachim NILSSON.

/trunk/patches/strace/4.5.17/180-no_cachectl.patch | 35 35 0 0 ++++++++++++++++++++++++++++
/trunk/patches/strace/4.5.18/170-no_cachectl.patch | 35 35 0 0 ++++++++++++++++++++++++++++
2 files changed, 70 insertions(+)
     1 reporter_name="Nate CASE"
     2 reporter_url="http://sourceware.org/ml/crossgcc/2008-10/msg00016.html"
     3 reporter_comment="This is a sample config file for Freescale e500v2 processors (e.g.,
     4 MPC8548, MPC8572).  It uses eglibc (for e500/SPE patches) and a recent
     5 gcc (4.3.1, for e500v2 DPFP support) and will generate appropriate
     6 dual-precision floating point instructions by default.
     7 
     8 Note: If building a Linux kernel with this toolchain, you will want to
     9 make sure -mno-spe AND -mspe=no are passed to gcc to prevent SPE
    10 ABI/instructions from getting into the kernel (which is currently
    11 unsupported).  At this time, the kernel build system only passes
    12 -mno-spe by default (this should be fixed soon hopefully).
    13 
    14 A binutils snapshot is used to fix a bug present in 2.18 preventing
    15 U-Boot from being compiled (CodeSourcery issue #2297: internal.h
    16 (ELF_IS_SECTION_IN_SEGMENT): Adjust to cope with segments at the end of
    17 memory)."