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patches/gcc/3.4.6/160-arm-ldm-peephole2.patch
author "Yann E. MORIN" <yann.morin.1998@anciens.enib.fr>
Sun Jul 17 17:54:21 2011 +0200 (2011-07-17)
changeset 2888 dd71df95903a
parent 746 b150d6f590fc
permissions -rw-r--r--
cc/gcc: pass the companion libs prefix to cc_core

In case of canadian-cross, the companion libraries are not the same for
the core cc (they run on 'build') as they are for the final cc (they run
on 'host').

Prepare for this differentiation (coming later), while retaining the
current behavior (to use the same compblibs).

Signed-off-by: "Yann E. MORIN" <yann.morin.1998@anciens.enib.fr> 
     1 diff -durN gcc-3.4.6.orig/gcc/config/arm/arm.c gcc-3.4.6/gcc/config/arm/arm.c

     2 --- gcc-3.4.6.orig/gcc/config/arm/arm.c	2007-08-15 22:57:51.000000000 +0200

     3 +++ gcc-3.4.6/gcc/config/arm/arm.c	2007-08-15 22:57:51.000000000 +0200

     4 @@ -4572,6 +4572,10 @@

     5  int

     6  adjacent_mem_locations (rtx a, rtx b)

     7  {

     8 +  /* We don't guarantee to preserve the order of these memory refs.  */

     9 +  if (volatile_refs_p (a) || volatile_refs_p (b))

    10 +    return 0;

    11 +

    12    if ((GET_CODE (XEXP (a, 0)) == REG

    13         || (GET_CODE (XEXP (a, 0)) == PLUS

    14  	   && GET_CODE (XEXP (XEXP (a, 0), 1)) == CONST_INT))

    15 @@ -4611,6 +4615,17 @@

    16  	return 0;

    17  

    18        val_diff = val1 - val0;

    19 +

    20 +      if (arm_ld_sched)

    21 +	{

    22 +	  /* If the target has load delay slots, then there's no benefit

    23 +	     to using an ldm instruction unless the offset is zero and

    24 +	     we are optimizing for size.  */

    25 +	  return (optimize_size && (REGNO (reg0) == REGNO (reg1))

    26 +		  && (val0 == 0 || val1 == 0 || val0 == 4 || val1 == 4)

    27 +		  && (val_diff == 4 || val_diff == -4));

    28 +	}

    29 +

    30        return ((REGNO (reg0) == REGNO (reg1))

    31  	      && (val_diff == 4 || val_diff == -4));

    32      }
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