New patches from Ioannis E. VENETIS to allow building more up-to-date Alpha x-compilers.
Some patches are still missing, though.
See: http://sourceware.org/ml/libc-help/2008-06/msg00061.html
/trunk/patches/glibc/2.5.1/270-glibc-alpha-cfi.patch | 25 25 0 0 ++++++++++
/trunk/patches/glibc/2.5.1/280-glibc-alpha-sigsuspend.patch | 24 24 0 0 ++++++++++
/trunk/patches/glibc/2.5/270-glibc-alpha-cfi.patch | 25 25 0 0 ++++++++++
/trunk/patches/glibc/2.5/280-glibc-alpha-sigsuspend.patch | 24 24 0 0 ++++++++++
/trunk/patches/glibc/linuxthreads-2.3.6/270-glibc-linuxthreads-alpha-cfi.patch | 25 25 0 0 ++++++++++
/trunk/patches/gcc/4.2.0/940-gcc-alpha-signal_h.patch | 17 17 0 0 +++++++
/trunk/patches/gcc/4.2.1/940-gcc-alpha-signal_h.patch | 17 17 0 0 +++++++
/trunk/patches/gcc/4.3.0/940-gcc-alpha-signal_h.patch | 17 17 0 0 +++++++
/trunk/patches/gcc/4.2.2/940-gcc-alpha-signal_h.patch | 17 17 0 0 +++++++
/trunk/patches/gcc/4.3.1/940-gcc-alpha-signal_h.patch | 17 17 0 0 +++++++
/trunk/patches/gcc/4.2.3/940-gcc-alpha-signal_h.patch | 17 17 0 0 +++++++
11 files changed, 225 insertions(+)
2 wget 'http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/opcodes/ppc-opc.c.diff?r1=1.70&r2=1.71&cvsroot=src'
4 http://mail.gnu.org/archive/html/bug-binutils/2004-05/msg00071.html
6 http://sources.redhat.com/ml/binutils-cvs/2004-05/msg00111.html
8 This fixes problems like
9 {standard input}: Assembler messages:
10 {standard input}:1: Error: Unrecognized opcode: `dssall'
11 which show up in binutils-2.15 when building the Linux kernel,
12 or possibly failed compilations when building setjmp/longjmp in glibc.
14 An alternative fix would be to pass -many to the assembler.
15 A patch to do that for glibc is at
16 wget 'http://sources.redhat.com/cgi-bin/get-raw-msg?listname=libc-alpha&date=2004-05&msgid=40B36E8C.9030609%40us.ibm.com'
17 Yet another, better, fix would be for gcc to generate assembly
18 that told the assembler which processor type to use.
19 Presumably the Linux kernel sources would need a fix, too.
20 Probably better to just fix binutils to accept sources that it used to.
23 ===================================================================
24 RCS file: /cvs/src/src/opcodes/ppc-opc.c,v
25 retrieving revision 1.70
26 retrieving revision 1.71
28 --- src/opcodes/ppc-opc.c 2004/05/05 13:43:36 1.70
29 +++ src/opcodes/ppc-opc.c 2004/05/19 05:11:48 1.71
30 @@ -1004,8 +1004,13 @@
32 /* If only one bit of the FXM field is set, we can use the new form
33 of the instruction, which is faster. Unlike the Power4 branch hint
34 - encoding, this is not backward compatible. */
35 - else if ((dialect & PPC_OPCODE_POWER4) != 0 && (value & -value) == value)
36 + encoding, this is not backward compatible. Do not generate the
37 + new form unless -mpower4 has been given, or -many and the two
38 + operand form of mfcr was used. */
39 + else if ((value & -value) == value
40 + && ((dialect & PPC_OPCODE_POWER4) != 0
41 + || ((dialect & PPC_OPCODE_ANY) != 0
42 + && (insn & (0x3ff << 1)) == 19 << 1)))
45 /* Any other value on mfcr is an error. */