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patches/gcc/4.6.0/000-gcc-bug-54369.patch
author Cody P Schafer <dev@codyps.com>
Mon May 12 00:02:13 2014 +0200 (2014-05-12)
changeset 3322 eb13867a034c
parent 3049 f0ae157444dc
permissions -rw-r--r--
arch/powerpc: add powerpc64le support

Technically, I don't forbid powerpcle support either, but I'm not sure that
there is any library/compiler support for that at the moment (though the hw
technically makes it possible).

powerpc64le needs glibc 2.19 and gcc 4.9. I haven't looked into the support
tools, but at least gdb 7.5 is too old (7.7.1 definitely has support).

Also make powerpc64 non-experimental. It's practically old at this point.

Signed-off-by: Cody P Schafer <dev@codyps.com>
[yann.morin.1998@free.fr: use ${target_endian_le} and ${target_bits_64}]
Signed-off-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Message-Id: <64bfbbced9dd8f62e0d6.1399801945@gun>
Patchwork-Id: 347775 
     1 Author: ebotcazou

     2 Date: Sun Sep  2 10:37:49 2012

     3 New Revision: 190860

     4 

     5 URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=190860

     6 Log:

     7     PR rtl-optimization/54369

     8     * config/mips/mips.c (mips_reorg): Invoke cleanup_barriers before

     9     calling dbr_schedule.

    10     * config/sparc/sparc.c (sparc_reorg): Likewise.

    11 

    12 Modified:

    13     branches/gcc-4_6-branch/gcc/ChangeLog

    14     branches/gcc-4_6-branch/gcc/config/mips/mips.c

    15     branches/gcc-4_6-branch/gcc/config/sparc/sparc.c

    16 

    17 [yann.morin.1998@free.fr: remove the sparc part, it does not apply]

    18 

    19 ---

    20 --- gcc-4_6-branch/gcc/config/mips/mips.c	2012/09/02 10:36:54	190859

    21 +++ gcc-4_6-branch/gcc/config/mips/mips.c	2012/09/02 10:37:49	190860

    22 @@ -15083,7 +15083,10 @@

    23      }

    24  

    25    if (optimize > 0 && flag_delayed_branch)

    26 -    dbr_schedule (get_insns ());

    27 +    {

    28 +      cleanup_barriers ();

    29 +      dbr_schedule (get_insns ());

    30 +    }

    31    mips_reorg_process_insns ();

    32    if (!TARGET_MIPS16

    33        && TARGET_EXPLICIT_RELOCS
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