patches/gcc/3.4.6/150-arm-ldm.patch
author Michael Hope <michael.hope@linaro.org>
Wed Oct 19 15:27:32 2011 +1300 (2011-10-19)
changeset 2739 f320e22f2cba
parent 746 b150d6f590fc
permissions -rw-r--r--
arch: add softfp support

Some architectures support a mixed hard/soft floating point, where
the compiler emits hardware floating point instructions, but passes
the operands in core (aka integer) registers.

For example, ARM supports this mode (to come in the next changeset).

Add support for softfp cross compilers to the GCC and GLIBC
configuration. Needed for Ubuntu and other distros that are softfp.

Signed-off-by: Michael Hope <michael.hope@linaro.org>
[yann.morin.1998@anciens.enib.fr: split the original patch]
Signed-off-by: "Yann E. MORIN" <yann.morin.1998@anciens.enib.fr>
     1 diff -durN gcc-3.4.6.orig/gcc/config/arm/arm.c gcc-3.4.6/gcc/config/arm/arm.c
     2 --- gcc-3.4.6.orig/gcc/config/arm/arm.c	2007-08-15 22:56:20.000000000 +0200
     3 +++ gcc-3.4.6/gcc/config/arm/arm.c	2007-08-15 22:56:20.000000000 +0200
     4 @@ -8524,6 +8524,26 @@
     5    return_used_this_function = 0;  
     6  }
     7  
     8 +/* Return the number (counting from 0) of
     9 +   the least significant set bit in MASK.  */
    10 +
    11 +#ifdef __GNUC__
    12 +inline
    13 +#endif
    14 +static int
    15 +number_of_first_bit_set (mask)
    16 +     int mask;
    17 +{
    18 +  int bit;
    19 +
    20 +  for (bit = 0;
    21 +       (mask & (1 << bit)) == 0;
    22 +       ++bit)
    23 +    continue;
    24 +
    25 +  return bit;
    26 +}
    27 +
    28  const char *
    29  arm_output_epilogue (rtx sibling)
    30  {
    31 @@ -8757,27 +8777,47 @@
    32  	  saved_regs_mask |=   (1 << PC_REGNUM);
    33  	}
    34  
    35 -      /* Load the registers off the stack.  If we only have one register
    36 -	 to load use the LDR instruction - it is faster.  */
    37 -      if (saved_regs_mask == (1 << LR_REGNUM))
    38 -	{
    39 -	  /* The exception handler ignores the LR, so we do
    40 -	     not really need to load it off the stack.  */
    41 -	  if (eh_ofs)
    42 -	    asm_fprintf (f, "\tadd\t%r, %r, #4\n", SP_REGNUM, SP_REGNUM);
    43 -	  else
    44 -	    asm_fprintf (f, "\tldr\t%r, [%r], #4\n", LR_REGNUM, SP_REGNUM);
    45 -	}
    46 -      else if (saved_regs_mask)
    47 +      if (saved_regs_mask)
    48  	{
    49 -	  if (saved_regs_mask & (1 << SP_REGNUM))
    50 -	    /* Note - write back to the stack register is not enabled
    51 -	       (ie "ldmfd sp!...").  We know that the stack pointer is
    52 -	       in the list of registers and if we add writeback the
    53 -	       instruction becomes UNPREDICTABLE.  */
    54 -	    print_multi_reg (f, "ldmfd\t%r", SP_REGNUM, saved_regs_mask);
    55 +	  /* Load the registers off the stack.  If we only have one register
    56 +	     to load use the LDR instruction - it is faster.  */
    57 +	  if (bit_count (saved_regs_mask) == 1)
    58 +	    {
    59 +	      int reg = number_of_first_bit_set (saved_regs_mask);
    60 +
    61 +	      switch (reg)
    62 +		{
    63 +		case SP_REGNUM:
    64 +		  /* Mustn't use base writeback when loading SP.  */
    65 +		  asm_fprintf (f, "\tldr\t%r, [%r]\n", SP_REGNUM, SP_REGNUM);
    66 +		  break;
    67 +		  
    68 +		case LR_REGNUM:
    69 +		  if (eh_ofs)
    70 +		    {
    71 +		      /* The exception handler ignores the LR, so we do
    72 +			 not really need to load it off the stack.  */
    73 +		      asm_fprintf (f, "\tadd\t%r, %r, #4\n", SP_REGNUM, SP_REGNUM);
    74 +		      break;
    75 +		    }
    76 +		  /* else fall through */
    77 +		  
    78 +		default:
    79 +		  asm_fprintf (f, "\tldr\t%r, [%r], #4\n", reg, SP_REGNUM);
    80 +		  break;
    81 +		}
    82 +	    }
    83  	  else
    84 -	    print_multi_reg (f, "ldmfd\t%r!", SP_REGNUM, saved_regs_mask);
    85 +	    {
    86 +	      if (saved_regs_mask & (1 << SP_REGNUM))
    87 +		/* Note - write back to the stack register is not enabled
    88 +		   (ie "ldmfd sp!...").  We know that the stack pointer is
    89 +		   in the list of registers and if we add writeback the
    90 +		   instruction becomes UNPREDICTABLE.  */
    91 +		print_multi_reg (f, "ldmfd\t%r", SP_REGNUM, saved_regs_mask);
    92 +	      else
    93 +		print_multi_reg (f, "ldmfd\t%r!", SP_REGNUM, saved_regs_mask);
    94 +	    }
    95  	}
    96  
    97        if (current_function_pretend_args_size)
    98 @@ -11405,22 +11445,6 @@
    99      }
   100  }
   101  
   102 -/* Return the number (counting from 0) of
   103 -   the least significant set bit in MASK.  */
   104 -
   105 -inline static int
   106 -number_of_first_bit_set (int mask)
   107 -{
   108 -  int bit;
   109 -
   110 -  for (bit = 0;
   111 -       (mask & (1 << bit)) == 0;
   112 -       ++bit)
   113 -    continue;
   114 -
   115 -  return bit;
   116 -}
   117 -
   118  /* Generate code to return from a thumb function.
   119     If 'reg_containing_return_addr' is -1, then the return address is
   120     actually on the stack, at the stack pointer.  */