arch: add softfp support

Some architectures support a mixed hard/soft floating point, where
the compiler emits hardware floating point instructions, but passes
the operands in core (aka integer) registers.

For example, ARM supports this mode (to come in the next changeset).

Add support for softfp cross compilers to the GCC and GLIBC
configuration. Needed for Ubuntu and other distros that are softfp.

Signed-off-by: Michael Hope <michael.hope@linaro.org>
[yann.morin.1998@anciens.enib.fr: split the original patch]
Signed-off-by: "Yann E. MORIN" <yann.morin.1998@anciens.enib.fr>

 diff -durN glibc-2.10.1.orig/sysdeps/sh/sh4/fpu/fpu_control.h glibc-2.10.1/sysdeps/sh/sh4/fpu/fpu_control.h

 --- glibc-2.10.1.orig/sysdeps/sh/sh4/fpu/fpu_control.h	2001-07-06 06:56:04.000000000 +0200

 +++ glibc-2.10.1/sysdeps/sh/sh4/fpu/fpu_control.h	2009-11-13 00:51:26.000000000 +0100

 @@ -45,6 +45,7 @@

  #define _FPU_GETCW(cw) __asm__ ("sts fpscr,%0" : "=r" (cw))

  #if defined __GNUC__

 +extern void __set_fpscr(unsigned long);

  #define _FPU_SETCW(cw) __set_fpscr ((cw))

  #else

  #define _FPU_SETCW(cw) __asm__ ("lds %0,fpscr" : : "r" (cw))