diff -r 000000000000 -r eeea35fbf182 patches/gcc/3.3.6/gcc-3.3.4-arm-pr22528.patch --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/patches/gcc/3.3.6/gcc-3.3.4-arm-pr22528.patch Sat Feb 24 11:00:05 2007 +0000 @@ -0,0 +1,71 @@ +From http://gcc.gnu.org/ml/gcc-patches/2003-11/msg00832.html, by +Richard Earnshaw. Fixes http://gcc.gnu.org/PR22528 + +--- gcc-3.3.4/gcc/config/arm/arm.md.orig 2004-03-30 22:43:44.000000000 +0200 ++++ gcc-3.3.4/gcc/config/arm/arm.md 2005-08-15 12:21:55.000000000 +0200 +@@ -4275,7 +4275,7 @@ + (set (match_dup 2) + (ashiftrt:SI (match_operand 0 "" "") (const_int 8))) + ;; store the high byte +- (set (match_dup 4) (subreg:QI (match_dup 2) 0))] ;explicit subreg safe ++ (set (match_dup 4) (match_dup 5))] + "TARGET_ARM" + " + { +@@ -4291,7 +4291,8 @@ + operands[1] = adjust_address (operands[1], QImode, 0); + operands[3] = gen_lowpart (QImode, operands[0]); + operands[0] = gen_lowpart (SImode, operands[0]); +- operands[2] = gen_reg_rtx (SImode); ++ operands[2] = gen_reg_rtx (SImode); ++ operands[5] = gen_lowpart (QImode, operands[2]); + }" + ) + +@@ -4299,7 +4300,7 @@ + [(set (match_dup 4) (match_dup 3)) + (set (match_dup 2) + (ashiftrt:SI (match_operand 0 "" "") (const_int 8))) +- (set (match_operand 1 "" "") (subreg:QI (match_dup 2) 3))] ++ (set (match_operand 1 "" "") (match_dup 5))] + "TARGET_ARM" + " + { +@@ -4316,13 +4317,14 @@ + operands[3] = gen_lowpart (QImode, operands[0]); + operands[0] = gen_lowpart (SImode, operands[0]); + operands[2] = gen_reg_rtx (SImode); ++ operands[5] = gen_lowpart (QImode, operands[2]); + }" + ) + + ;; Subroutine to store a half word integer constant into memory. + (define_expand "storeinthi" + [(set (match_operand 0 "" "") +- (subreg:QI (match_operand 1 "" "") 0)) ++ (match_operand 1 "" "")) + (set (match_dup 3) (match_dup 2))] + "TARGET_ARM" + " +@@ -4363,6 +4365,7 @@ + operands[3] = adjust_address (op0, QImode, 1); + operands[0] = adjust_address (operands[0], QImode, 0); + operands[2] = gen_lowpart (QImode, operands[2]); ++ operands[1] = gen_lowpart (QImode, operands[1]); + }" + ) + +@@ -4682,11 +4685,12 @@ + (set (match_dup 3) + (ashiftrt:SI (match_dup 2) (const_int 16))) + (set (match_operand:HI 0 "s_register_operand" "") +- (subreg:HI (match_dup 3) 0))] ++ (match_dup 4))] + "TARGET_ARM" + " + operands[2] = gen_reg_rtx (SImode); + operands[3] = gen_reg_rtx (SImode); ++ operands[4] = gen_lowpart (HImode, operands[3]); + " + ) +