1.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     1.2 +++ b/patches/glibc/2.9/530-powerpc-8xx-CPU15-errata.patch	Sat Mar 28 22:21:33 2009 +0000
     1.3 @@ -0,0 +1,56 @@
     1.4 +Fix memset on PowerPC 8xx, by Nye Liu:
     1.5 +http://sourceware.org/ml/crossgcc/2008-10/msg00067.html
     1.6 +
     1.7 +Quote:
     1.8 + I am working on a powerpc 860 toolchain, but I am having problems  
     1.9 + convincing glibc to not emit code that uses the dcbz instruction (CPU15  
    1.10 + dcbX bug). The source of the problem is sysdeps/powerpc/power3/memset.S
    1.11 +
    1.12 +--- glibc-2.7/sysdeps/powerpc/powerpc32/memset.S	2007-03-26 13:09:07.000000000 -0700
    1.13 ++++ glibc-2.7/sysdeps/powerpc/powerpc32/memset.S.new	2008-10-23 20:28:52.000000000 -0700
    1.14 +@@ -112,11 +112,13 @@
    1.15 + 	clrrwi.	rALIGN, rLEN, 5
    1.16 + 	mtcrf	0x01, rLEN	/* 40th instruction from .align */
    1.17 + 
    1.18 ++#ifndef BROKEN_PPC_8xx_CPU15
    1.19 + /* Check if we can use the special case for clearing memory using dcbz.
    1.20 +    This requires that we know the correct cache line size for this
    1.21 +    processor.  Getting the __cache_line_size may require establishing GOT
    1.22 +    addressability, so branch out of line to set this up.  */
    1.23 + 	beq	cr1, L(checklinesize)
    1.24 ++#endif
    1.25 + 
    1.26 + /* Store blocks of 32-bytes (256-bits) starting on a 32-byte boundary.
    1.27 +    Can't assume that rCHR is zero or that the cache line size is either
    1.28 +@@ -158,6 +160,7 @@
    1.29 + 	add	rMEMP, rMEMP, rALIGN
    1.30 + 	b	L(medium_tail2)	/* 72nd instruction from .align */
    1.31 + 
    1.32 ++#ifndef BROKEN_PPC_8xx_CPU15
    1.33 + 	.align	5
    1.34 + 	nop
    1.35 + /* Clear cache lines of memory in 128-byte chunks.
    1.36 +@@ -191,6 +194,7 @@
    1.37 + 	bdnz	L(zloop)
    1.38 + 	beqlr	cr5
    1.39 + 	b	L(medium_tail2)
    1.40 ++#endif /* ! BROKEN_PPC_8xx_CPU15 */
    1.41 + 
    1.42 + 	.align	5
    1.43 + L(small):
    1.44 +@@ -248,6 +252,7 @@
    1.45 + 	stw	rCHR, -8(rMEMP)
    1.46 + 	blr
    1.47 + 
    1.48 ++#ifndef BROKEN_PPC_8xx_CPU15
    1.49 + L(checklinesize):
    1.50 + #ifdef SHARED
    1.51 + 	mflr	rTMP
    1.52 +@@ -329,6 +334,7 @@
    1.53 + L(handletail32):
    1.54 + 	clrrwi.	rALIGN, rLEN, 5
    1.55 + 	b	L(nondcbz)
    1.56 ++#endif /* ! BROKEN_PPC_8xx_CPU15 */
    1.57 + 
    1.58 + END (BP_SYM (memset))
    1.59 + libc_hidden_builtin_def (memset)