1.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
1.2 +++ b/patches/glibc/2.7/290-powerpc-8xx-CPU15-errata.patch Thu Oct 23 21:12:29 2008 +0000
1.3 @@ -0,0 +1,40 @@
1.4 +Fix memset on PowerPC 8xx, by Nye Liu:
1.5 +http://sourceware.org/ml/crossgcc/2008-10/msg00067.html
1.6 +
1.7 +Quote:
1.8 + I am working on a powerpc 860 toolchain, but I am having problems
1.9 + convincing glibc to not emit code that uses the dcbz instruction (CPU15
1.10 + dcbX bug). The source of the problem is sysdeps/powerpc/power3/memset.S
1.11 +
1.12 +--- glibc-2.7/sysdeps/powerpc/powerpc32/memset.S 2007-03-26 13:09:07.000000000 -0700
1.13 ++++ glibc-2.7/sysdeps/powerpc/powerpc32/memset.S.new 2008-10-23 12:20:04.000000000 -0700
1.14 +@@ -112,11 +112,13 @@
1.15 + clrrwi. rALIGN, rLEN, 5
1.16 + mtcrf 0x01, rLEN /* 40th instruction from .align */
1.17 +
1.18 ++#ifndef BROKEN_PPC_8xx_CPU15
1.19 + /* Check if we can use the special case for clearing memory using dcbz.
1.20 + This requires that we know the correct cache line size for this
1.21 + processor. Getting the __cache_line_size may require establishing GOT
1.22 + addressability, so branch out of line to set this up. */
1.23 + beq cr1, L(checklinesize)
1.24 ++#endif
1.25 +
1.26 + /* Store blocks of 32-bytes (256-bits) starting on a 32-byte boundary.
1.27 + Can't assume that rCHR is zero or that the cache line size is either
1.28 +@@ -248,6 +250,7 @@
1.29 + stw rCHR, -8(rMEMP)
1.30 + blr
1.31 +
1.32 ++#ifndef BROKEN_PPC_8xx_CPU15
1.33 + L(checklinesize):
1.34 + #ifdef SHARED
1.35 + mflr rTMP
1.36 +@@ -329,6 +332,7 @@
1.37 + L(handletail32):
1.38 + clrrwi. rALIGN, rLEN, 5
1.39 + b L(nondcbz)
1.40 ++#endif /* ! BROKEN_PPC_8xx_CPU15 */
1.41 +
1.42 + END (BP_SYM (memset))
1.43 + libc_hidden_builtin_def (memset)