xtensa: add support for the configurable Xtensa architecture.

The Xtensa processor architecture is a configurable, extensible,
and synthesizable 32-bit RISC processor core. Processor and SOC vendors
can select from various processor options and even create customized
instructions in addition to a base ISA to tailor the processor for
a particular application.

Because of the configurability, the build process requires one additional
step for gcc, binutils, and gdb to update the default configuration.
These configurations are packed into an 'overlay' tar image, and are
simply untarred on top of the default configuration during the build.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>

1 files changed, 20 insertions, 0 deletions

diff --git a/config/arch/xtensa.in b/config/arch/xtensa.in
new file mode 100644
index 0000000..dfe6d16
--- /dev/null
+++ b/config/arch/xtensa.in
@@ -0,0 +1,20 @@
+# xtensa specific configuration file
+
+## select ARCH_SUPPORTS_32
+## select ARCH_SUPPORTS_BOTH_MMU
+## select ARCH_DEFAULT_HAS_MMU
+##
+## help The xtensa architecture
+## help
+## help    Xtensa is a configurable and extensible processor architecture.
+## help    Supporting a specific configuration typically requires minor
+## help    modifications to a small set of configuration files in various
+## help    development tools. This process is automated and only requires
+## help    a configuration specific 'overlay' file.
+## help
+## help    For a custom configuration, select the XTENSA_CUSTOM option and
+## help    provide the name of the overlay file through the
+## help    CT_ARCH_XTENSA_CUSTOM_NAME option.
+## help
+## help    The default option (ARCH_xtensa_fsf) uses a built-in configuration,
+## help    which may or may not work for a particular Xtensa processor.