Add the full crosstool-NG sources to the new repository of its own.

You might just say: 'Yeah! crosstool-NG's got its own repo!".
Unfortunately, that's because the previous repo got damaged beyond repair and I had no backup.
That means I'm putting backups in place in the afternoon.
That also means we've lost history... :-(

5 files changed, 301 insertions, 0 deletions

diff --git a/patches/gcc/3.3.4/gcc-3.3.4-arm-bigendian.patch b/patches/gcc/3.3.4/gcc-3.3.4-arm-bigendian.patch
new file mode 100644
index 0000000..0816b83
--- /dev/null
+++ b/patches/gcc/3.3.4/gcc-3.3.4-arm-bigendian.patch
@@ -0,0 +1,62 @@
+diff -urN gcc-3.3.4.orig/gcc/config/arm/linux-elf.h gcc-3.3.4/gcc/config/arm/linux-elf.h
+--- gcc-3.3.4.orig/gcc/config/arm/linux-elf.h	2004-03-30 22:43:45.000000000 +0200
++++ gcc-3.3.4/gcc/config/arm/linux-elf.h	2004-08-20 02:13:02.969084177 +0200
+@@ -30,17 +30,31 @@
+ /* Do not assume anything about header files.  */
+ #define NO_IMPLICIT_EXTERN_C
+ 
++/*
++ * 'config.gcc' defines TARGET_BIG_ENDIAN_DEFAULT as 1 for arm*b-*
++ * (big endian) configurations.
++ */
++#if TARGET_BIG_ENDIAN_DEFAULT
++#define TARGET_ENDIAN_DEFAULT ARM_FLAG_BIG_END
++#define TARGET_ENDIAN_OPTION "mbig-endian"
++#define TARGET_LINKER_EMULATION "armelfb_linux"
++#else
++#define TARGET_ENDIAN_DEFAULT 0
++#define TARGET_ENDIAN_OPTION "mlittle-endian"
++#define TARGET_LINKER_EMULATION "armelf_linux"
++#endif
++
+ /* Default is to use APCS-32 mode.  */
+ #undef  TARGET_DEFAULT
+-#define TARGET_DEFAULT (ARM_FLAG_APCS_32 | ARM_FLAG_MMU_TRAPS)
++#define TARGET_DEFAULT (ARM_FLAG_APCS_32 | ARM_FLAG_MMU_TRAPS | TARGET_ENDIAN_DEFAULT)
+ 
+ #define SUBTARGET_CPU_DEFAULT TARGET_CPU_arm6
+ 
+-#define SUBTARGET_EXTRA_LINK_SPEC " -m armelf_linux -p"
++#define SUBTARGET_EXTRA_LINK_SPEC " -m " TARGET_LINKER_EMULATION " -p"
+ 
+ #undef  MULTILIB_DEFAULTS
+ #define MULTILIB_DEFAULTS \
+-	{ "marm", "mlittle-endian", "mhard-float", "mapcs-32", "mno-thumb-interwork" }
++	{ "marm", TARGET_ENDIAN_OPTION, "mhard-float", "mapcs-32", "mno-thumb-interwork" }
+ 
+ #define CPP_APCS_PC_DEFAULT_SPEC "-D__APCS_32__"
+ 
+@@ -88,7 +102,7 @@
+    %{rdynamic:-export-dynamic} \
+    %{!dynamic-linker:-dynamic-linker /lib/ld-linux.so.2} \
+    -X \
+-   %{mbig-endian:-EB}" \
++   %{mbig-endian:-EB} %{mlittle-endian:-EL}" \
+    SUBTARGET_EXTRA_LINK_SPEC
+ 
+ #define TARGET_OS_CPP_BUILTINS()		\
+diff -urN gcc-3.3.4.orig/gcc/config.gcc gcc-3.3.4/gcc/config.gcc
+--- gcc-3.3.4.orig/gcc/config.gcc	2004-04-29 06:42:47.000000000 +0200
++++ gcc-3.3.4/gcc/config.gcc	2004-08-20 02:11:04.326143343 +0200
+@@ -699,6 +699,11 @@
+ 	;;
+ arm*-*-linux*)			# ARM GNU/Linux with ELF
+ 	tm_file="dbxelf.h elfos.h arm/elf.h arm/linux-gas.h arm/linux-elf.h arm/aout.h arm/arm.h"
++	case $machine in
++	arm*b-*)
++		tm_defines="TARGET_BIG_ENDIAN_DEFAULT=1 $tm_defines"
++		;;
++	esac
+ 	tmake_file="t-slibgcc-elf-ver t-linux arm/t-linux"
+ 	extra_parts="crtbegin.o crtbeginS.o crtend.o crtendS.o"
+ 	gnu_ld=yes
diff --git a/patches/gcc/3.3.4/gcc-3.3.4-arm-pr22528.patch b/patches/gcc/3.3.4/gcc-3.3.4-arm-pr22528.patch
new file mode 100644
index 0000000..0611e2c
--- /dev/null
+++ b/patches/gcc/3.3.4/gcc-3.3.4-arm-pr22528.patch
@@ -0,0 +1,71 @@
+From http://gcc.gnu.org/ml/gcc-patches/2003-11/msg00832.html, by
+Richard Earnshaw.  Fixes http://gcc.gnu.org/PR22528
+
+--- gcc-3.3.4/gcc/config/arm/arm.md.orig	2004-03-30 22:43:44.000000000 +0200
++++ gcc-3.3.4/gcc/config/arm/arm.md	2005-08-15 12:21:55.000000000 +0200
+@@ -4275,7 +4275,7 @@
+    (set (match_dup 2)
+ 	(ashiftrt:SI (match_operand 0 "" "") (const_int 8)))
+    ;; store the high byte
+-   (set (match_dup 4) (subreg:QI (match_dup 2) 0))]	;explicit subreg safe
++   (set (match_dup 4) (match_dup 5))]
+   "TARGET_ARM"
+   "
+   {
+@@ -4291,7 +4291,8 @@
+     operands[1] = adjust_address (operands[1], QImode, 0);
+     operands[3] = gen_lowpart (QImode, operands[0]);
+     operands[0] = gen_lowpart (SImode, operands[0]);
+-    operands[2] = gen_reg_rtx (SImode); 
++    operands[2] = gen_reg_rtx (SImode);
++    operands[5] = gen_lowpart (QImode, operands[2]);
+   }"
+ )
+ 
+@@ -4299,7 +4300,7 @@
+   [(set (match_dup 4) (match_dup 3))
+    (set (match_dup 2)
+ 	(ashiftrt:SI (match_operand 0 "" "") (const_int 8)))
+-   (set (match_operand 1 "" "")	(subreg:QI (match_dup 2) 3))]
++   (set (match_operand 1 "" "")	(match_dup 5))]
+   "TARGET_ARM"
+   "
+   {
+@@ -4316,13 +4317,14 @@
+     operands[3] = gen_lowpart (QImode, operands[0]);
+     operands[0] = gen_lowpart (SImode, operands[0]);
+     operands[2] = gen_reg_rtx (SImode);
++    operands[5] = gen_lowpart (QImode, operands[2]);
+   }"
+ )
+ 
+ ;; Subroutine to store a half word integer constant into memory.
+ (define_expand "storeinthi"
+   [(set (match_operand 0 "" "")
+-	(subreg:QI (match_operand 1 "" "") 0))
++	(match_operand 1 "" ""))
+    (set (match_dup 3) (match_dup 2))]
+   "TARGET_ARM"
+   "
+@@ -4363,6 +4365,7 @@
+     operands[3] = adjust_address (op0, QImode, 1);
+     operands[0] = adjust_address (operands[0], QImode, 0);
+     operands[2] = gen_lowpart (QImode, operands[2]);
++    operands[1] = gen_lowpart (QImode, operands[1]);
+   }"
+ )
+ 
+@@ -4682,11 +4685,12 @@
+    (set (match_dup 3)
+ 	(ashiftrt:SI (match_dup 2) (const_int 16)))
+    (set (match_operand:HI 0 "s_register_operand" "")
+-	(subreg:HI (match_dup 3) 0))]
++	(match_dup 4))]
+   "TARGET_ARM"
+   "
+   operands[2] = gen_reg_rtx (SImode);
+   operands[3] = gen_reg_rtx (SImode);
++  operands[4] = gen_lowpart (HImode, operands[3]);
+   "
+ )
+ 
diff --git a/patches/gcc/3.3.4/gcc-3.3.4-libstdcxx-sh.patch b/patches/gcc/3.3.4/gcc-3.3.4-libstdcxx-sh.patch
new file mode 100644
index 0000000..4f21be3
--- /dev/null
+++ b/patches/gcc/3.3.4/gcc-3.3.4-libstdcxx-sh.patch
@@ -0,0 +1,38 @@
+Date: Tue, 06 Jul 2004 10:40:57 +0900 (JST)
+Message-Id: <20040706.104057.48529182.kkojima@rr.iij4u.or.jp>
+To: dank@kegel.com
+Cc: linux-sh@m17n.org, linuxsh-dev@lists.sourceforge.net
+Subject: gcc-3.4.1 (Was: The current kernel for a Jornada 680 SH3)
+From: Kaz Kojima <kkojima@rr.iij4u.or.jp>
+In-Reply-To: <20040529.175014.48668611.kkojima@rr.iij4u.or.jp>
+References: <20040528.125858.50336810.kkojima@rr.iij4u.or.jp>
+	<40B8205D.8030200@kegel.com>
+	<20040529.175014.48668611.kkojima@rr.iij4u.or.jp>
+
+Hi,
+
+...
+
+BTW, gcc-3.3.4 was also released and there is a bad news :-(  Someone
+reverted wrongly a configury patch against libstdc++ for sh-linux at
+the last moment.  We have to regenerate gcc-3.3.4/libstdc++-v3/configure
+with autoconf 2.13 or apply the one-line patch below manually:
+
+--- gcc-3.3.4-orig/libstdc++-v3/configure	2004-06-01 09:45:44.000000000 +0900
++++ gcc-3.3.4/libstdc++-v3/configure	2004-06-29 22:38:05.000000000 +0900
+@@ -2009,7 +2009,7 @@ irix5* | irix6*)
+ # This must be Linux ELF.
+ linux-gnu*)
+   case $host_cpu in
+-  alpha* | hppa* | i*86 | powerpc* | sparc* | ia64* )
++  alpha* | hppa* | i*86 | powerpc* | sparc* | ia64* | sh* )
+     lt_cv_deplibs_check_method=pass_all ;;
+   *)
+     # glibc up to 2.1.1 does not perform some relocations on ARM
+
+
+Regards,
+	kaz
+
+
+
diff --git a/patches/gcc/3.3.4/gcc-3.3.4-ppc-asm-spec.patch b/patches/gcc/3.3.4/gcc-3.3.4-ppc-asm-spec.patch
new file mode 100644
index 0000000..9e45943
--- /dev/null
+++ b/patches/gcc/3.3.4/gcc-3.3.4-ppc-asm-spec.patch
@@ -0,0 +1,86 @@
+Based on gcc-3.4.0/gcc-3.3.3h-ppc-asm-spec.patch
+
+Fixes the following errors when building gcc for ppc7450:
+
+/tmp/ccj38uQs.s: Assembler messages:
+/tmp/ccj38uQs.s:4370: Error: Unrecognized opcode: `mfvrsave'
+/tmp/ccj38uQs.s:4404: Error: Unrecognized opcode: `stvx'
+/tmp/ccj38uQs.s:4571: Error: Unrecognized opcode: `lvx'
+/tmp/ccj38uQs.s:4572: Error: Unrecognized opcode: `mtvrsave'
+make[2]: *** [libgcc/./unwind-dw2.o] Error 1
+make[2]: Leaving directory `/opt/crosstool-0.28-rc35/build/powerpc-7450-linux-gnu/gcc-3.3.4-glibc-2.3.2/build-gcc-core/gcc'
+make[1]: *** [stmp-multilib] Error 2
+make[1]: Leaving directory `/opt/crosstool-0.28-rc35/build/powerpc-7450-linux-gnu/gcc-3.3.4-glibc-2.3.2/build-gcc-core/gcc'
+make: *** [all-gcc] Error 2
+
+Note that the "-mcpu=7450" option must appear on the "gcc" command line in
+order for "-maltivec" to be passed to the assembler.  Or, "-maltivec" itself
+may be passed to the "gcc" command.
+
+Contributed by Tom Warzeka <waz@quahog.npt.nuwc.navy.mil>
+
+===================================================================
+--- gcc-3.3.4/gcc/config/rs6000/rs6000.h~	2004-02-01 23:40:49.000000000 -0500
++++ gcc-3.3.4/gcc/config/rs6000/rs6000.h	2004-08-18 14:15:57.000000000 -0400
+@@ -52,23 +52,29 @@
+ "%{!mcpu*: \
+   %{mpower: %{!mpower2: -mpwr}} \
+   %{mpower2: -mpwrx} \
+-  %{mpowerpc*: -mppc} \
++  %{mpowerpc64*: -mppc64} \
++  %{!mpowerpc64*: %{mpowerpc*: -mppc}} \
+   %{mno-power: %{!mpowerpc*: -mcom}} \
+-  %{!mno-power: %{!mpower2: %(asm_default)}}} \
++  %{!mno-power: %{!mpower*: %(asm_default)}}} \
+ %{mcpu=common: -mcom} \
+ %{mcpu=power: -mpwr} \
+ %{mcpu=power2: -mpwrx} \
+-%{mcpu=power3: -m604} \
++%{mcpu=power3: -mppc64} \
+ %{mcpu=power4: -mpower4} \
++%{mcpu=power5: -mpower4} \
+ %{mcpu=powerpc: -mppc} \
+ %{mcpu=rios: -mpwr} \
+ %{mcpu=rios1: -mpwr} \
+ %{mcpu=rios2: -mpwrx} \
+ %{mcpu=rsc: -mpwr} \
+ %{mcpu=rsc1: -mpwr} \
++%{mcpu=rs64a: -mppc64} \
+ %{mcpu=401: -mppc} \
+ %{mcpu=403: -m403} \
+ %{mcpu=405: -m405} \
++%{mcpu=405fp: -m405} \
++%{mcpu=440: -m440} \
++%{mcpu=440fp: -m440} \
+ %{mcpu=505: -mppc} \
+ %{mcpu=601: -m601} \
+ %{mcpu=602: -mppc} \
+@@ -77,18 +83,23 @@
+ %{mcpu=ec603e: -mppc} \
+ %{mcpu=604: -mppc} \
+ %{mcpu=604e: -mppc} \
+-%{mcpu=620: -mppc} \
+-%{mcpu=630: -m604} \
++%{mcpu=620: -mppc64} \
++%{mcpu=630: -mppc64} \
+ %{mcpu=740: -mppc} \
+-%{mcpu=7400: -mppc} \
+-%{mcpu=7450: -mppc} \
+ %{mcpu=750: -mppc} \
++%{mcpu=G3: -mppc} \
++%{mcpu=7400: -mppc -maltivec} \
++%{mcpu=7450: -mppc -maltivec} \
++%{mcpu=G4: -mppc -maltivec} \
+ %{mcpu=801: -mppc} \
+ %{mcpu=821: -mppc} \
+ %{mcpu=823: -mppc} \
+ %{mcpu=860: -mppc} \
++%{mcpu=970: -mpower4 -maltivec} \
++%{mcpu=G5: -mpower4 -maltivec} \
+ %{mcpu=8540: -me500} \
+-%{maltivec: -maltivec}"
++%{maltivec: -maltivec} \
++-many"
+ 
+ #define CPP_DEFAULT_SPEC ""
+ 
diff --git a/patches/gcc/3.3.4/gcc-3.3.4-trap-posix.patch b/patches/gcc/3.3.4/gcc-3.3.4-trap-posix.patch
new file mode 100644
index 0000000..eef35b5
--- /dev/null
+++ b/patches/gcc/3.3.4/gcc-3.3.4-trap-posix.patch
@@ -0,0 +1,44 @@
+# 
+# Submitted-By: Marc Kleine-Budde <mkl@pengutronix.de>, 2005-04-20
+#
+# Error:
+#
+# creating libintl.h
+# Configuring etc...
+# loading cache ../config.cache
+# checking for a BSD compatible install... (cached) /usr/bin/install -c
+# creating ./config.status
+# creating Makefile
+# trap: usage: trap [-lp] [[arg] signal_spec ...]
+#
+# Description:
+#
+# non-posix conform usage of trap causes bash >= 3.0 to fail
+# e.g.: http://sourceware.org/ml/crossgcc/2004-12/msg00132.html
+#
+# Status:
+#
+# fixed in gcc >= 3.3.5
+# backport of gcc-3.3.5 fix
+#
+diff -ruN gcc-3.3.4-orig/configure gcc-3.3.4/configure
+--- gcc-3.3.4-orig/configure	2002-09-29 18:11:24.000000000 +0200
++++ gcc-3.3.4/configure	2005-04-20 21:11:30.000000000 +0200
+@@ -697,7 +697,7 @@
+ if test -f skip-this-dir; then
+ 	# Perform the same cleanup as the trap handler, minus the "exit 1" of course,
+ 	# and reset the trap handler.
+-	trap 0
++	trap '' 0
+ 	rm -rf Makefile* ${tmpdir}
+ 	# Execute the final clean-up actions
+ 	${config_shell} skip-this-dir
+@@ -1596,7 +1596,7 @@
+ # Perform the same cleanup as the trap handler, minus the "exit 1" of course,
+ # and reset the trap handler.
+ rm -rf ${tmpdir}
+-trap 0
++trap '' 0
+ 
+ exit 0
+