diff options
| author |   Paul Walmsley <paul.walmsley@sifive.com> | 2018-09-24 18:09:39 (GMT) |
|---|---|---|
| committer | Paul Walmsley <paul.walmsley@sifive.com> | 2018-09-24 18:09:39 (GMT) |
| commit | af8da8b181c43fe97de63c39e1d14e6c59a8950b (patch) | |
| tree | 3563d78d22c57f7ebeeacf212ebb1a75a2b494ad /samples/riscv64-unknown-elf | |
| parent | a6580b8e8b55345a5a342b5bd96e42c83e640ac5 (diff) | |
riscv64: add rv64gc bare-metal sample
This sample works well for building the open-source first stage
bootloader for the SiFive U540 device (and similar):
https://github.com/sifive/freedom-u540-c000-bootloader
Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
Diffstat (limited to 'samples/riscv64-unknown-elf')
| -rw-r--r-- | samples/riscv64-unknown-elf/crosstool.config | 7 | ||||
| -rw-r--r-- | samples/riscv64-unknown-elf/reported.by | 3 |
2 files changed, 10 insertions, 0 deletions
diff --git a/samples/riscv64-unknown-elf/crosstool.config b/samples/riscv64-unknown-elf/crosstool.config new file mode 100644 index 0000000..221ef20 --- /dev/null +++ b/samples/riscv64-unknown-elf/crosstool.config @@ -0,0 +1,7 @@ +CT_EXPERIMENTAL=y +CT_ARCH_RISCV=y +# CT_DEMULTILIB is not set +CT_ARCH_USE_MMU=y +CT_ARCH_64=y +CT_DEBUG_GDB=y +# CT_GDB_CROSS_PYTHON is not set diff --git a/samples/riscv64-unknown-elf/reported.by b/samples/riscv64-unknown-elf/reported.by new file mode 100644 index 0000000..9456e59 --- /dev/null +++ b/samples/riscv64-unknown-elf/reported.by @@ -0,0 +1,3 @@ +reporter_name="Paul Walmsley <paul.walmsley@sifive.com>" +reporter_url="https://www.sifive.com/" +reporter_comment="" |