diff options
| -rw-r--r-- | config/arch/riscv.in | 10 | ||||
| -rw-r--r-- | samples/riscv32-unknown-elf/crosstool.config | 5 | ||||
| -rw-r--r-- | samples/riscv32-unknown-elf/reported.by | 3 | ||||
| -rw-r--r-- | scripts/build/arch/riscv.sh | 5 |
4 files changed, 23 insertions, 0 deletions
diff --git a/config/arch/riscv.in b/config/arch/riscv.in new file mode 100644 index 0000000..1323347 --- /dev/null +++ b/config/arch/riscv.in @@ -0,0 +1,10 @@ +# RISC-V specific config options + +## depends on EXPERIMENTAL +## +## select ARCH_SUPPORTS_32 +## select ARCH_DEFAULT_32 +## select GCC_REQUIRE_7_or_later + +## help The RISC-V architecture, as defined by: +## help http://www.riscv.org/ diff --git a/samples/riscv32-unknown-elf/crosstool.config b/samples/riscv32-unknown-elf/crosstool.config new file mode 100644 index 0000000..22a8f3f --- /dev/null +++ b/samples/riscv32-unknown-elf/crosstool.config @@ -0,0 +1,5 @@ +CT_EXPERIMENTAL=y +CT_ARCH_RISCV=y +CT_TARGET_VENDOR="" +CT_LIBC_NONE=y +# CT_CC_GCC_LDBL_128 is not set diff --git a/samples/riscv32-unknown-elf/reported.by b/samples/riscv32-unknown-elf/reported.by new file mode 100644 index 0000000..82ccb87 --- /dev/null +++ b/samples/riscv32-unknown-elf/reported.by @@ -0,0 +1,3 @@ +reporter_name="Antony Pavlov" +reporter_url="https://github.com/frantony/crosstool-ng" +reporter_comment="" diff --git a/scripts/build/arch/riscv.sh b/scripts/build/arch/riscv.sh new file mode 100644 index 0000000..a0a5ba4 --- /dev/null +++ b/scripts/build/arch/riscv.sh @@ -0,0 +1,5 @@ +# Compute RISC-V-specific values + +CT_DoArchTupleValues() { + CT_TARGET_ARCH="riscv${CT_ARCH_BITNESS}" +} |