diff options
Diffstat (limited to 'packages/gmp/6.2.1/0000-Avoid-the-x18-register.patch')
| -rw-r--r-- | packages/gmp/6.2.1/0000-Avoid-the-x18-register.patch | 69 |
1 files changed, 36 insertions, 33 deletions
diff --git a/packages/gmp/6.2.1/0000-Avoid-the-x18-register.patch b/packages/gmp/6.2.1/0000-Avoid-the-x18-register.patch index 5c1c232..02f1fd7 100644 --- a/packages/gmp/6.2.1/0000-Avoid-the-x18-register.patch +++ b/packages/gmp/6.2.1/0000-Avoid-the-x18-register.patch @@ -6,9 +6,22 @@ # Parent 63bce6cacb48d9a1ade560db5f6e5da073969a09 Avoid the x18 register since it is reserved on Darwin. -diff -r 63bce6cacb48 -r f4ff6ff711ed mpn/arm64/aors_n.asm ---- a/mpn/arm64/aors_n.asm Sun Nov 15 10:25:36 2020 +0100 -+++ b/mpn/arm64/aors_n.asm Sun Nov 29 23:07:23 2020 +0100 +--- + mpn/arm64/aors_n.asm | 12 ++++++------ + mpn/arm64/aorsmul_1.asm | 13 +++++++++---- + mpn/arm64/aorsorrlshC_n.asm | 12 ++++++------ + mpn/arm64/cnd_aors_n.asm | 12 ++++++------ + mpn/arm64/logops_n.asm | 12 ++++++------ + mpn/arm64/lshift.asm | 10 +++++----- + mpn/arm64/lshiftc.asm | 10 +++++----- + mpn/arm64/mul_1.asm | 14 +++++++------- + mpn/arm64/rsh1aors_n.asm | 20 ++++++++++---------- + mpn/arm64/rshift.asm | 10 +++++----- + mpn/arm64/sqr_diag_addlsh1.asm | 10 +++++----- + 11 files changed, 70 insertions(+), 65 deletions(-) + +--- a/mpn/arm64/aors_n.asm ++++ b/mpn/arm64/aors_n.asm @@ -68,7 +68,7 @@ EPILOGUE() PROLOGUE(func_n) @@ -56,9 +69,8 @@ diff -r 63bce6cacb48 -r f4ff6ff711ed mpn/arm64/aors_n.asm L(end): ADDSUBC x12, x6, x10 ADDSUBC x13, x7, x11 -diff -r 63bce6cacb48 -r f4ff6ff711ed mpn/arm64/aorsmul_1.asm ---- a/mpn/arm64/aorsmul_1.asm Sun Nov 15 10:25:36 2020 +0100 -+++ b/mpn/arm64/aorsmul_1.asm Sun Nov 29 23:07:23 2020 +0100 +--- a/mpn/arm64/aorsmul_1.asm ++++ b/mpn/arm64/aorsmul_1.asm @@ -32,10 +32,15 @@ include(`../config.m4') @@ -79,9 +91,8 @@ diff -r 63bce6cacb48 -r f4ff6ff711ed mpn/arm64/aorsmul_1.asm C NOTES C * It is possible to keep the carry chain alive between the addition blocks -diff -r 63bce6cacb48 -r f4ff6ff711ed mpn/arm64/aorsorrlshC_n.asm ---- a/mpn/arm64/aorsorrlshC_n.asm Sun Nov 15 10:25:36 2020 +0100 -+++ b/mpn/arm64/aorsorrlshC_n.asm Sun Nov 29 23:07:23 2020 +0100 +--- a/mpn/arm64/aorsorrlshC_n.asm ++++ b/mpn/arm64/aorsorrlshC_n.asm @@ -65,14 +65,14 @@ ASM_START() @@ -128,9 +139,8 @@ diff -r 63bce6cacb48 -r f4ff6ff711ed mpn/arm64/aorsorrlshC_n.asm L(end): ldp x4, x5, [up,#16] extr x12, x10, x9, #RSH -diff -r 63bce6cacb48 -r f4ff6ff711ed mpn/arm64/cnd_aors_n.asm ---- a/mpn/arm64/cnd_aors_n.asm Sun Nov 15 10:25:36 2020 +0100 -+++ b/mpn/arm64/cnd_aors_n.asm Sun Nov 29 23:07:23 2020 +0100 +--- a/mpn/arm64/cnd_aors_n.asm ++++ b/mpn/arm64/cnd_aors_n.asm @@ -65,7 +65,7 @@ CLRCY @@ -178,9 +188,8 @@ diff -r 63bce6cacb48 -r f4ff6ff711ed mpn/arm64/cnd_aors_n.asm L(end): bic x6, x12, cnd bic x7, x13, cnd -diff -r 63bce6cacb48 -r f4ff6ff711ed mpn/arm64/logops_n.asm ---- a/mpn/arm64/logops_n.asm Sun Nov 15 10:25:36 2020 +0100 -+++ b/mpn/arm64/logops_n.asm Sun Nov 29 23:07:23 2020 +0100 +--- a/mpn/arm64/logops_n.asm ++++ b/mpn/arm64/logops_n.asm @@ -78,7 +78,7 @@ ASM_START() @@ -228,9 +237,8 @@ diff -r 63bce6cacb48 -r f4ff6ff711ed mpn/arm64/logops_n.asm L(end): LOGOP( x12, x6, x10) LOGOP( x13, x7, x11) -diff -r 63bce6cacb48 -r f4ff6ff711ed mpn/arm64/lshift.asm ---- a/mpn/arm64/lshift.asm Sun Nov 15 10:25:36 2020 +0100 -+++ b/mpn/arm64/lshift.asm Sun Nov 29 23:07:23 2020 +0100 +--- a/mpn/arm64/lshift.asm ++++ b/mpn/arm64/lshift.asm @@ -61,7 +61,7 @@ add rp, rp_arg, n, lsl #3 add up, up, n, lsl #3 @@ -272,9 +280,8 @@ diff -r 63bce6cacb48 -r f4ff6ff711ed mpn/arm64/lshift.asm L(end): orr x10, x10, x13 orr x11, x12, x2 -diff -r 63bce6cacb48 -r f4ff6ff711ed mpn/arm64/lshiftc.asm ---- a/mpn/arm64/lshiftc.asm Sun Nov 15 10:25:36 2020 +0100 -+++ b/mpn/arm64/lshiftc.asm Sun Nov 29 23:07:23 2020 +0100 +--- a/mpn/arm64/lshiftc.asm ++++ b/mpn/arm64/lshiftc.asm @@ -61,7 +61,7 @@ add rp, rp_arg, n, lsl #3 add up, up, n, lsl #3 @@ -316,9 +323,8 @@ diff -r 63bce6cacb48 -r f4ff6ff711ed mpn/arm64/lshiftc.asm L(end): eon x10, x10, x13 eon x11, x12, x2 -diff -r 63bce6cacb48 -r f4ff6ff711ed mpn/arm64/mul_1.asm ---- a/mpn/arm64/mul_1.asm Sun Nov 15 10:25:36 2020 +0100 -+++ b/mpn/arm64/mul_1.asm Sun Nov 29 23:07:23 2020 +0100 +--- a/mpn/arm64/mul_1.asm ++++ b/mpn/arm64/mul_1.asm @@ -56,7 +56,7 @@ PROLOGUE(mpn_mul_1) @@ -368,9 +374,8 @@ diff -r 63bce6cacb48 -r f4ff6ff711ed mpn/arm64/mul_1.asm L(end): mul x8, x4, v0 adcs x13, x9, x10 -diff -r 63bce6cacb48 -r f4ff6ff711ed mpn/arm64/rsh1aors_n.asm ---- a/mpn/arm64/rsh1aors_n.asm Sun Nov 15 10:25:36 2020 +0100 -+++ b/mpn/arm64/rsh1aors_n.asm Sun Nov 29 23:07:23 2020 +0100 +--- a/mpn/arm64/rsh1aors_n.asm ++++ b/mpn/arm64/rsh1aors_n.asm @@ -59,7 +59,7 @@ ASM_START() @@ -440,9 +445,8 @@ diff -r 63bce6cacb48 -r f4ff6ff711ed mpn/arm64/rsh1aors_n.asm L(end): extr x16, x15, x14, #1 extr x17, x12, x15, #1 -diff -r 63bce6cacb48 -r f4ff6ff711ed mpn/arm64/rshift.asm ---- a/mpn/arm64/rshift.asm Sun Nov 15 10:25:36 2020 +0100 -+++ b/mpn/arm64/rshift.asm Sun Nov 29 23:07:23 2020 +0100 +--- a/mpn/arm64/rshift.asm ++++ b/mpn/arm64/rshift.asm @@ -60,7 +60,7 @@ PROLOGUE(mpn_rshift) mov rp, rp_arg @@ -484,9 +488,8 @@ diff -r 63bce6cacb48 -r f4ff6ff711ed mpn/arm64/rshift.asm L(end): orr x10, x10, x13 orr x11, x12, x2 -diff -r 63bce6cacb48 -r f4ff6ff711ed mpn/arm64/sqr_diag_addlsh1.asm ---- a/mpn/arm64/sqr_diag_addlsh1.asm Sun Nov 15 10:25:36 2020 +0100 -+++ b/mpn/arm64/sqr_diag_addlsh1.asm Sun Nov 29 23:07:23 2020 +0100 +--- a/mpn/arm64/sqr_diag_addlsh1.asm ++++ b/mpn/arm64/sqr_diag_addlsh1.asm @@ -47,7 +47,7 @@ ASM_START() PROLOGUE(mpn_sqr_diag_addlsh1) |